rvv: fix vfmerge.vfm for fp16

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

1 files changed, 15 insertions, 2 deletions

diff --git a/riscv/insns/vfmerge_vfm.h b/riscv/insns/vfmerge_vfm.h
index 33dacfa..bd00e32 100644
--- a/riscv/insns/vfmerge_vfm.h
+++ b/riscv/insns/vfmerge_vfm.h
@@ -3,7 +3,20 @@ VI_CHECK_SSS(false);
 VI_VFP_COMMON;
 
 switch(P.VU.vsew) {
-  case 32:
+  case e16:
+    for (reg_t i=P.VU.vstart; i<vl; ++i) {
+      auto &vd = P.VU.elt<float16_t>(rd_num, i, true);
+      auto rs1 = f16(READ_FREG(rs1_num));
+      auto vs2 = P.VU.elt<float16_t>(rs2_num, i);
+
+      int midx = (P.VU.vmlen * i) / 64;
+      int mpos = (P.VU.vmlen * i) % 64;
+      bool use_first = (P.VU.elt<uint64_t>(0, midx) >> mpos) & 0x1;
+
+      vd = use_first ? rs1 : vs2;
+    }
+    break;
+  case e32:
     for (reg_t i=P.VU.vstart; i<vl; ++i) {
       auto &vd = P.VU.elt<float32_t>(rd_num, i, true);
       auto rs1 = f32(READ_FREG(rs1_num));
@@ -16,7 +29,7 @@ switch(P.VU.vsew) {
       vd = use_first ? rs1 : vs2;
     }
     break;
-  case 64:
+  case e64:
     for (reg_t i=P.VU.vstart; i<vl; ++i) {
       auto &vd = P.VU.elt<float64_t>(rd_num, i, true);
       auto rs1 = f64(READ_FREG(rs1_num));