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| author | Dave.Wen <dave.wen@sifive.com> | 2020-05-17 20:23:05 -0700 |
|---|---|---|
| committer | Dave.Wen <dave.wen@sifive.com> | 2020-05-17 20:23:20 -0700 |
| commit | a2fd1be698c2ff2fe067ea301b4f5c8173ff09a3 (patch) | |
| tree | aeb656b4308e8e4846c149c2f00cffb22325cd35 | |
| parent | 425ad2f1420c124ffc505b508f780c38c82edcb5 (diff) | |
| download | spike-a2fd1be698c2ff2fe067ea301b4f5c8173ff09a3.zip spike-a2fd1be698c2ff2fe067ea301b4f5c8173ff09a3.tar.gz spike-a2fd1be698c2ff2fe067ea301b4f5c8173ff09a3.tar.bz2 | |
rvv: mlen=1 WIP
| -rw-r--r-- | riscv/decode.h | 7 | ||||
| -rw-r--r-- | riscv/processor.cc | 2 |
2 files changed, 5 insertions, 4 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 9d6b7be..b90f3ec 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -462,19 +462,20 @@ static inline bool is_overlapped(const int astart, const int asize, } #define VI_CHECK_SSS(is_vs1) \ + if (insn.v_vm() == 0) \ + require(insn.rd() != 0); \ if (P.VU.vlmul > 1) { \ require((insn.rd() & (P.VU.vlmul - 1)) == 0); \ require((insn.rs2() & (P.VU.vlmul - 1)) == 0); \ if (is_vs1) { \ require((insn.rs1() & (P.VU.vlmul - 1)) == 0); \ } \ - if (insn.v_vm() == 0) \ - require(insn.rd() != 0); \ } #define VI_CHECK_STORE_SXX \ require_vector; \ - require((insn.rd() & (P.VU.vlmul - 1)) == 0); + if (insn.v_vm() == 0) \ + require(insn.rd() != 0); #define VI_CHECK_SXX \ VI_CHECK_STORE_SXX; \ diff --git a/riscv/processor.cc b/riscv/processor.cc index d140648..01a8021 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -405,7 +405,7 @@ reg_t processor_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t newT vlmul = 1 << vlmul; vlmax = VLEN/vsew * vlmul; } - vmlen = vsew / vlmul; + vmlen = 1; vill = !(vlmul>=1 && vlmul <=8) || vsew > ELEN || vediv != 1 || (newType >> 8) != 0; if (vill) { |