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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-20 23:39:35 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 00:25:32 -0700 |
| commit | 978a96683a6b672ba7f3104d5ee5c214195ebcdc (patch) | |
| tree | 9a6791ee0ce97c456a57961cb2091816cabad327 | |
| parent | 7babb447e1c2b2bdd0506fd40c3b9498374cb866 (diff) | |
| download | spike-978a96683a6b672ba7f3104d5ee5c214195ebcdc.zip spike-978a96683a6b672ba7f3104d5ee5c214195ebcdc.tar.gz spike-978a96683a6b672ba7f3104d5ee5c214195ebcdc.tar.bz2 | |
rvv: index should align vemul
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
| -rw-r--r-- | riscv/decode.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index d679072..1c9c238 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -458,7 +458,7 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) require(P.VU.vemul >= 0.125 && P.VU.vemul <= 8); \ reg_t flmul = P.VU.vflmul < 1 ? 1 : P.VU.vflmul; \ require_align(insn.rd(), P.VU.vflmul); \ - require_align(insn.rs2(), P.VU.vflmul); \ + require_align(insn.rs2(), P.VU.vemul); \ require((nf * flmul) <= (NVPR / 4) && \ (insn.rd() + nf * flmul) <= NVPR); \ |