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| author | Dave.Wen <dave.wen@sifive.com> | 2020-05-13 05:12:00 -0700 |
|---|---|---|
| committer | Dave.Wen <dave.wen@sifive.com> | 2020-05-13 05:12:00 -0700 |
| commit | 170ff9c86f928479d75a08e4f72c2e7d7e5b34a0 (patch) | |
| tree | 083aebe3ef738abba108695cc744b80d40977f3a | |
| parent | ca171807aa81db67b01749e68e73013f58073adf (diff) | |
| download | spike-170ff9c86f928479d75a08e4f72c2e7d7e5b34a0.zip spike-170ff9c86f928479d75a08e4f72c2e7d7e5b34a0.tar.gz spike-170ff9c86f928479d75a08e4f72c2e7d7e5b34a0.tar.bz2 | |
vtype: fix the vta and vma functions and debugging display
| -rw-r--r-- | riscv/decode.h | 3 | ||||
| -rw-r--r-- | riscv/execute.cc | 4 | ||||
| -rw-r--r-- | riscv/processor.cc | 2 | ||||
| -rw-r--r-- | spike_main/disasm.cc | 3 |
4 files changed, 9 insertions, 3 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 5f8b829..1bbc017 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -118,10 +118,13 @@ public: uint64_t v_zimm11() { return x(20, 11); } uint64_t v_lmul() { return 1 << x(20, 2); } uint64_t v_sew() { return 1 << (x(22, 3) + 3); } + uint64_t v_frac_lmul() { return 1 << x(25, 1); } uint64_t v_width() { return x(12, 3); } uint64_t v_mop() { return x(26, 2); } uint64_t v_lumop() { return x(20, 5); } uint64_t v_sumop() { return x(20, 5); } + uint64_t v_vta() { return x(26, 1); } + uint64_t v_vma() { return x(27, 1); } uint64_t v_mew() { return x(28, 1); } private: diff --git a/riscv/execute.cc b/riscv/execute.cc index 129b118..79d51dd 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -254,8 +254,8 @@ void processor_t::step(size_t n) if (debug && !state.serialized) { prev_reg_state_t *saved = prev_state; if (saved->VU.setvl_count != VU.setvl_count) { - fprintf(stderr, "vconfig <- sew=%lu vlmul=%ld vlmax=%lu vl=%lu\n", - VU.vsew, VU.vlmul, VU.vlmax, VU.vl); + fprintf(stderr, "vconfig <- sew=%lu vlmul=%ld vlmax=%lu vl=%lu vta=%ld, vma=%ld\n", + VU.vsew, VU.vlmul, VU.vlmax, VU.vl, VU.vta, VU.vma); saved->VU.setvl_count = VU.setvl_count; } for (int i=0; i<NXPR; ++i) { diff --git a/riscv/processor.cc b/riscv/processor.cc index 827ea1d..4578d94 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -383,7 +383,7 @@ reg_t processor_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t newT vlmax = fractional_lmul? (VLEN/vsew)/vlmul : VLEN/vsew * vlmul; vmlen = fractional_lmul? 1 : vsew / vlmul; - vill = vsew > ELEN || vediv != 1 || (newType >> 7) != 0; + vill = !(vlmul>=1 && vlmul <=8) || vsew > ELEN || vediv != 1 || (newType >> 8) != 0; if (vill) { vlmax = 0; vtype = UINT64_MAX << (p->get_xlen() - 1); diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 82cebcd..bae3d51 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -319,9 +319,12 @@ struct : public arg_t { std::stringstream s; int sew = insn.v_sew(); int lmul = insn.v_lmul(); + auto vta = insn.v_vta() == 1 ? "ta" : "tu"; + auto vma = insn.v_vma() == 1 ? "ma" : "mu"; s << "e" << sew; if (lmul != 1) s << ",m" << lmul; + s << ", " << vta << ", " << vma; return s.str(); } } v_vtype; |