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authorSchuyler Eldridge <schuyler.eldridge@ibm.com>2020-05-06 17:53:18 -0400
committerChih-Min Chao <chihmin.chao@sifive.com>2020-05-19 19:56:44 -0700
commit02ea77d713777142e4cb51fbc2af3cf9c9a29fb7 (patch)
treed21b4cdb56aa51054ca7a03f13eccf8d0333ce92
parent3a17237fd605094f33c036900e5a638aa941b2e1 (diff)
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Add missing stdexcept imports
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
-rw-r--r--fesvr/dtm.cc1
-rw-r--r--riscv/devices.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/fesvr/dtm.cc b/fesvr/dtm.cc
index 91cacb2..418ac63 100644
--- a/fesvr/dtm.cc
+++ b/fesvr/dtm.cc
@@ -6,6 +6,7 @@
#include <string.h>
#include <assert.h>
#include <pthread.h>
+#include <stdexcept>
#define RV_X(x, s, n) \
(((x) >> (s)) & ((1 << (n)) - 1))
diff --git a/riscv/devices.h b/riscv/devices.h
index 1bc9618..3dd6c66 100644
--- a/riscv/devices.h
+++ b/riscv/devices.h
@@ -7,6 +7,7 @@
#include <string>
#include <map>
#include <vector>
+#include <stdexcept>
class processor_t;