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| author | Andrew Waterman <andrew@sifive.com> | 2024-07-22 18:31:03 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-22 18:31:03 -0700 |
| commit | 64bc0c1f1d8ff3746ef4eb39e9d142a4456ed029 (patch) | |
| tree | 089f34f55c71a0c88802b4bbb9efa61e8ab2467f | |
| parent | 7dce83820ea8abf9989dccfaa45c2a8647432969 (diff) | |
| parent | e86e653ef35fcd6de8bb2ebe701dccdb9f30a6c7 (diff) | |
| download | spike-master.zip spike-master.tar.gz spike-master.tar.bz2 | |
fcvtmod.w.d: Not update fflags if no exception flag, e.g., exp == frac == 0
| -rw-r--r-- | riscv/decode_macros.h | 10 | ||||
| -rw-r--r-- | riscv/insns/fcvtmod_w_d.h | 3 |
2 files changed, 7 insertions, 6 deletions
diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h index ffb334c..0f32a3a 100644 --- a/riscv/decode_macros.h +++ b/riscv/decode_macros.h @@ -211,10 +211,12 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) } \ } while (0); -#define set_fp_exceptions ({ if (softfloat_exceptionFlags) { \ - STATE.fflags->write(STATE.fflags->read() | softfloat_exceptionFlags); \ - } \ - softfloat_exceptionFlags = 0; }) +#define raise_fp_exceptions(flags) do { if (flags) STATE.fflags->write(STATE.fflags->read() | (flags)); } while (0); +#define set_fp_exceptions \ + do { \ + raise_fp_exceptions(softfloat_exceptionFlags); \ + softfloat_exceptionFlags = 0; \ + } while (0); #define sext32(x) ((sreg_t)(int32_t)(x)) #define zext32(x) ((reg_t)(uint32_t)(x)) diff --git a/riscv/insns/fcvtmod_w_d.h b/riscv/insns/fcvtmod_w_d.h index e39400d..231f605 100644 --- a/riscv/insns/fcvtmod_w_d.h +++ b/riscv/insns/fcvtmod_w_d.h @@ -55,6 +55,5 @@ if (exp == 0) { } WRITE_RD(sext32(frac)); -STATE.fflags->write(STATE.fflags->read() | - (inexact ? softfloat_flag_inexact : 0) | +raise_fp_exceptions((inexact ? softfloat_flag_inexact : 0) | (invalid ? softfloat_flag_invalid : 0)); |