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authorSwapnil Ingle <swapnil.ingle@nutanix.com>2021-05-27 13:49:57 +0200
committerGitHub <noreply@github.com>2021-05-27 13:49:57 +0200
commitaaa19498e194368c80f2b12b7f380c911f98d9cc (patch)
tree04616539ec3b172782ec26555ef21e1d4cfd5994 /test/lspci.expected.out.2
parente0690cf179293d983cb9a7837e7fa2ebc0308d30 (diff)
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Fix struct pxcap (#534)
* Added missing reserved bits and renamed per to rer nameing as the nvme specs * Add pxcap capability in lspci test Signed-off-by: Swapnil Ingle <swapnil.ingle@nutanix.com> Reviewed-by: John Levon <john.levon@nutanix.com>
Diffstat (limited to 'test/lspci.expected.out.2')
-rw-r--r--test/lspci.expected.out.24
1 files changed, 2 insertions, 2 deletions
diff --git a/test/lspci.expected.out.2 b/test/lspci.expected.out.2
index fc1abf6..0cde25c 100644
--- a/test/lspci.expected.out.2
+++ b/test/lspci.expected.out.2
@@ -13,9 +13,9 @@
Capabilities: [48] Vendor Specific Information: Len=10 <?>
Capabilities: [58] Express (v0) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
- ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- SlotPowerLimit 0.000W
+ ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset+ SlotPowerLimit 0.000W
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
+ RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported