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| author | Thanos Makatos <thanos.makatos@nutanix.com> | 2021-06-22 14:21:12 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-06-22 14:21:12 +0100 |
| commit | 397bb4f347c25142330ab1a74985be041533fe5a (patch) | |
| tree | 335c9f2766f75f4542bd81aad85973e15d105f2d /lib | |
| parent | a28eb4ac7daad8706dc7c493160b8bd620f4602b (diff) | |
| download | libvfio-user-397bb4f347c25142330ab1a74985be041533fe5a.zip libvfio-user-397bb4f347c25142330ab1a74985be041533fe5a.tar.gz libvfio-user-397bb4f347c25142330ab1a74985be041533fe5a.tar.bz2 | |
PCI: handle cache line register (#573)
Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com>
Reviewed-by: John Levon <john.levon@nutanix.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/pci.c | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -233,6 +233,11 @@ pci_hdr_write(vfu_ctx_t *vfu_ctx, const char *buf, loff_t offset) cfg_space->hdr.intr.iline = buf[0]; vfu_log(vfu_ctx, LOG_DEBUG, "ILINE=%0x", cfg_space->hdr.intr.iline); break; + case PCI_CACHE_LINE_SIZE: + cfg_space->hdr.cls = (uint8_t)buf[0]; + vfu_log(vfu_ctx, LOG_DEBUG, "cache line size set to %#hhx", + cfg_space->hdr.cls); + break; case PCI_LATENCY_TIMER: cfg_space->hdr.mlt = (uint8_t)buf[0]; vfu_log(vfu_ctx, LOG_INFO, "set to latency timer to %hhx", |