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2024-07-31video: Use cyclic to handle video syncSimon Glass2-4/+77
At present U-Boot flushes the cache after every character written to the display. This makes the command-line slower, to the point that pasting in long strings can fail. Add a cyclic function to sync the display every 10ms. Enable this by default. Allow much longer times for sandbox, since the SDL display is quite slow. Avoid size growth if the feature is disabled by making the new init and destroy functions dependent on CYCLIC being enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31video: Move last_sync to private dataSimon Glass1-7/+3
Rather than using a static variable, use the video device's private data to remember when the last video sync was completed. This allows each display to have its own sync and avoids using static data in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-22drivers: video: Remove duplicate newlinesMarek Vasut16-30/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-05video: tegra20: dc: use nvidia,head property to identify DC controllerSvyatoslav Ryhel2-7/+3
Use existing nvidia,head device tree property to get DC controller id. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"WIP/20May2024-nextTom Rini111-110/+10
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini111-10/+110
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07video: Remove <common.h> and add needed includesTom Rini111-110/+10
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-22Merge patch series "Kconfig: some cleanups"Tom Rini2-2/+2
Michal Simek <michal.simek@amd.com> says: I looked as cleaning up some dependencies and I found that qconfig is reporting some issues. This series is fixing some of them. But there are still some other pending. That's why please go and fix them if they are related to your board. UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in a loop you will find some other issue with copyright chars or some issues in files taken from the Linux kernel like DTs. They should be likely fixed in the kernel first. Based on discussion I am ignoring names too.
2024-04-22common: Convert *.c/h from UTF-8 to ASCII enconfingMichal Simek2-2/+2
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or names are converted. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Behún <kabel@kernel.org>
2024-04-21video: Assume video to be active if SPL is passing video hand-offDevarsh Thakkar1-0/+4
If SPL is passing video handoff structure to U-boot then it is safe to assume that SPL has already enabled video and that's why it is passing video handoff structure to U-boot so that U-boot can preserve the framebuffer. Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2024-04-21video: simplefb: modernise DT parsingCaleb Connolly1-12/+20
simplefb was using old style FDT parsing which doesn't behave well in combination with livetree. Update it to use ofnode instead and add a missing null check for the "format" property. Standardise the error logging while we're here. Fixes: 971d7e64245d ("video: simplefb") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-21video: renesas: shift the init sequence by one step earlierSvyatoslav Ryhel2-79/+95
Shift all setup stages one step earlier to better fit the existing uclass. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: bridge: ssd2825: shift the init sequence by one step earlierSvyatoslav Ryhel1-41/+45
Shift all setup stages one step earlier to better fit the existing uclass. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: endeavoru-panel: shift the init sequence by one step earlierSvyatoslav Ryhel1-60/+68
Shift all setup stages one step earlier to better fit the existing uclass. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: bridge: add basic support for the Parade DP501 transmitterJonas Schwöbel3-0/+590
The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It enables an RGB/Parallel SOC output to be converted, packed and serialized into either DP or TMDS output device. Only DisplayPort functionality of this transmitter has been implemented and tested. Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: bridge: add Toshiba TC358768 RGB to DSI bridge supportSvyatoslav Ryhel3-0/+995
Add initial support for the Toshiba TC358768 RGB to DSI bridge. The driver is based on the mainline Linux Toshiba TC358768 bridge driver and implements the same set of features. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: panel: add Samsung LTL106HL02 MIPI DSI panel driverAnton Bambura3-0/+167
LTL106HL02 is a color active matrix TFT (Thin Film Transistor) liquid crystal display (LCD) that uses amorphous silicon TFT as switching devices. This model is composed of a TFT LCD panel, a driver circuit and a backlight unit. The resolution of a 10.6" contains 1920 x 1080 pixels and can display up to 16,8M color with wide viewing angle. Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Anton Bambura <jenneron@protonmail.com>
2024-04-21video: panel: add LG LG070WX3 MIPI DSI panel driverSvyatoslav Ryhel3-0/+195
The LD070WX3 is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally Black mode. This TFT-LCD has 7.0 inches diagonally measured active display area with WXGA resolution (800 by 1280 pixel array). Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: tegra20: dsi: use set_backlight for backlight onlyJonas Schwöbel1-6/+4
Shift the backlight set further to prevent visual glitches on panel init. Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dsi: set correct fifo depthJonas Schwöbel1-1/+1
According to Thierry Reding's commit in the linux kernel 976cebc35bed0456a42bf96073a26f251d23b264 "drm/tegra: dsi: Make FIFO depths host parameters" correct depth of the video FIFO is 1920 *words* no *bytes* Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dsi: remove pre-configurationJonas Schwöbel1-2/+0
Configuration for DC driver command mode is not required for every panel. Removed. Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dsi: add reset supportSvyatoslav Ryhel1-0/+14
Implement reset use to discard any changes which could have been applied to DSI before and can interfere with current configuration. Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: tegra20: dsi: add T114 supportSvyatoslav Ryhel2-3/+310
Existing Tegra DSI driver mostly fits T114 apart MIPI calibration which on T114 has dedicated driver. To resolve this MIPI calibration logic was split for pre-T114 and T114+ devices. Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: add MIPI calibration driverSvyatoslav Ryhel2-1/+189
Dedicated MIPI calibration driver is used on T114 and newer. Before T114 MIPI calibration registers were part of VI and CSI. Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: parameterize V- and H-sync polaritiesSvyatoslav Ryhel1-2/+20
Based on Thierry Reding's Linux commit: 'commit 1716b1891e1de05e2c20ccafa9f58550f3539717 ("drm/tegra: rgb: Parameterize V- and H-sync polarities")' Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: clean framebuffer memory blockJonas Schwöbel1-0/+5
Fill the framebuffer memory with zeros to avoid visual glitches. Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: enable backlight after DC is configuredJonas Schwöbel1-7/+1
The goal of panel_set_backlight() is to enable backlight. Hence, it should be called at the probe end. Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: fix printing of framebuffer addressJonas Schwöbel1-1/+1
Framebuffer address should not be a pointer. Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: tegra20: dc: configure behavior if PLLD/D2 is usedSvyatoslav Ryhel3-13/+36
If DISP1 is a PLLD/D2 child, it cannot go over 370MHz. The cause of this is not quite clear. This can be overcomed by further halving the PLLD/D2 if the target parent rate is over 800MHz. This way DISP1 and DSI clocks will have the same frequency. The shift divider in this case has to be calculated from the original PLLD/D2 frequency and is passed from the DSI driver. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Microsoft Surface 2 Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: add powergateSvyatoslav Ryhel1-0/+27
Add powergate use on T114 to complete resetting of DC. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: add PLLD2 parent supportSvyatoslav Ryhel1-0/+6
T30+ SOC have second PLLD - PLLD2 which can be actively used by DC and act as main DISP1/2 clock parent. Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: pass DC id to internal devicesSvyatoslav Ryhel2-0/+9
Tegra SoC has 2 independent display controllers called DC_A and DC_B, they are handled differently by internal video devices like DSI and HDMI controllers so it is important for last to know which display controller is used to properly set up registers. To achieve this, a pipe field was added to pdata to pass display controller id to internal Tegra SoC devices. Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: tegra20: consolidate DC headerSvyatoslav Ryhel4-3/+46
Consolidate HD headers and place the result into video/tegra20 since it is used only by devices from this directory. Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: fix image shift on rotated panelsSvyatoslav Ryhel1-2/+2
Subtracting 1 from x and y fixes image shifting on rotated panels. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS Grouper E1565 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21video: tegra20: dc: diverge DC per-SOCSvyatoslav Ryhel1-35/+72
Diverge DC driver setup to better fit each of supported generations of Tegra SOC. Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Ion Agorria <ion@agorria.com> # HTC One X Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21video: dw_hdmi: Fix compiler warnings with gcc-14Khem Raj1-4/+4
GCC-14 find more warnings like "make pointer from integer without a cast" fix them by adding a type cast. Signed-off-by: Khem Raj <raj.khem@gmail.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Tom Rini <trini@konsulko.com>
2024-04-21video: rockchip: Add rk3328 vop supportJagan Teki2-0/+84
Add support for Rockchip RK3328 VOP. Require VOP cleanup before handoff to Linux by writing reset values to WIN registers. Without this Linux VOP trigger page fault as below [ 0.752016] Loading compiled-in X.509 certificates [ 0.787796] inno_hdmi_phy_rk3328_clk_recalc_rate: parent 24000000 [ 0.788391] inno-hdmi-phy ff430000.phy: inno_hdmi_phy_rk3328_clk_recalc_rate rate 148500000 vco 148500000 [ 0.798353] rockchip-drm display-subsystem: bound ff370000.vop (ops vop_component_ops) [ 0.799403] dwhdmi-rockchip ff3c0000.hdmi: supply avdd-0v9 not found, using dummy regulator [ 0.800288] rk_iommu ff373f00.iommu: Enable stall request timed out, status: 0x00004b [ 0.801131] dwhdmi-rockchip ff3c0000.hdmi: supply avdd-1v8 not found, using dummy regulator [ 0.802056] rk_iommu ff373f00.iommu: Disable paging request timed out, status: 0x00004b [ 0.803233] dwhdmi-rockchip ff3c0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (inno_dw_hdmi_phy2) [ 0.805355] dwhdmi-rockchip ff3c0000.hdmi: registered DesignWare HDMI I2C bus driver [ 0.808769] rockchip-drm display-subsystem: bound ff3c0000.hdmi (ops dw_hdmi_rockchip_ops) [ 0.810869] [drm] Initialized rockchip 1.0.0 20140818 for display-subsystem on minor 0 Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: rockchip: Add rk3328 hdmi supportJagan Teki3-0/+130
Add Rockchip RK3328 HDMI Out driver. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: rockchip: vop: Add dsp offset supportJagan Teki2-6/+10
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have different offsets for dsp registers. Group the dsp register set via dsp_regs pointers so that dsp_offset would point the dsp_regs to access for any changes in the offset value. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: rockchip: vop: Add win offset supportJagan Teki2-9/+15
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have different offsets for win registers. Group the win register set via win_regs pointers so that win_offset would point the win_regs to access for any changes in the offset value. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: rockchip: vop: Simplify rkvop_enableJagan Teki1-4/+4
Get the regs from priv pointer instead of passing it an argument. This would simplify the code and better readability. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: dw_hdmi: Add setup_hpd hookJagan Teki1-0/+3
Add support for DW HDMI Setup HPD status. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-04-21video: dw_hdmi: Add read_hpd hookJagan Teki1-0/+3
Add support for DW HDMI Read HPD status. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-04-21video: dw_hdmi: Extend the HPD detectionJagan Teki3-10/+19
HPD detection on some DW HDMI designed SoC's would need to read and setup the HPD status explicitly. So, extend the HPD detection code by adding the dw_hdmi_detect_hpd function and move the default detection code caller there. The new read and setup hdp will integrate the same function in later patches. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-04-21video: dw_hdmi: Add Vendor PHY handlingJagan Teki4-4/+19
DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY. Extend the vendor phy handling by adding platform phy hooks. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-04-21video: rockchip: hdmi: Detect hpd after controller initJagan Teki1-3/+3
HDP is a hardware connector event, so detect the same once the controller and attached PHY initialization are done. Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2024-04-21video: simple_panel: add EDID supportSvyatoslav Ryhel1-2/+64
Support timing parsing from EDID if panel device tree node provides DDC i2c bus instead of timings node. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF201 Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> [agust: reworked to fix dm_i2c_* build errors and to big img size] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2024-04-20video: simple_panel: simplify platform data passSvyatoslav Ryhel1-24/+12
Pass MIPI DSI platform data to simple DSI panel directly from driver data on panel probe. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-10Merge patch series "Resolve issues with booting distros on x86"Tom Rini3-7/+19
Simon Glass <sjg@chromium.org> says: This little series reprises the EFI-video fix, fixes a USB problem and enables a boot script for coreboot. It also moves to truetype fonts for coreboot and qemu-x86, since the menus look much better and there are no strong size constraints. With these changes it is possible to boot a Linux distro automatically with U-Boot on x86, including when U-Boot is the second-stage bootloader.
2024-04-10x86: Enable SSE in 64-bit modeSimon Glass1-0/+1
This is needed to support Truetype fonts. In any case, the compiler expects SSE to be available in 64-bit mode. Provide an option to enable SSE so that hardware floating-point arithmetic works. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Suggested-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-09-05 14:11:56 +0000