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2024-05-22Merge patch series "Clean-up patch set for MbedTLS integration"WIP/22May2024-nextTom Rini1-4/+4
Raymond Mao <raymond.mao@linaro.org> says: This patch set is picked from the previously posted serie: "[RFC] Integrate MbedTLS v3.6 LTS with U-Boot" They are not directly related to MbedTLS integration, but the prerequisite for a few clean-up, refactoring and minor fixes. For V2, the linker script patch is dropped and added one patch to move the snprintf to stdio.h
2024-05-22md5: Use typedef for MD5 contextRaymond Mao1-4/+4
Use of typedef is beneficial for porting with other crypto libs without changing the API callers. Secondly, it is for the code consistency with other digest libs. SHA1, SHA256 and SHA512 are all using typedef for their context. Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"WIP/20May2024-nextTom Rini20-19/+10
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20Merge tag 'v2024.07-rc3' into nextTom Rini20-10/+19
Prepare v2024.07-rc3
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini20-10/+19
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-13crypto: nuvoton: npcm_sha: Support SHA 384/512Jim Liu1-772/+252
1. Use vendor naming rule to rename each function 2. add SHA 384/512 support Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-05-07crypto: Remove <common.h> and add needed includesTom Rini20-19/+10
Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-05crypto/fsl: Differentiate between CAAM and DCP in Kconfig entryMarek Vasut1-2/+2
Differentiate between "Enable Random Number Generator support" and "Enable Random Number Generator support" in Kconfig entry, mark the first as CAAM and the second as DCP, otherwise users cannot easily decide which of the options is which and enable the correct one. Signed-off-by: Marek Vasut <marex@denx.de>
2024-05-05crypto/fsl: Introduce SPL_FSL_CAAM_RNGMarek Vasut2-1/+8
Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be disabled in SPL if necessary. This may be necessary due to e.g. size constraints of the SPL. Signed-off-by: Marek Vasut <marex@denx.de>
2024-05-05rng: Introduce SPL_DM_RNGMarek Vasut1-2/+2
Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL if necessary. This may be necessary due to e.g. size constraints of the SPL. Signed-off-by: Marek Vasut <marex@denx.de>
2024-04-22Kconfig: Add missing quotes around source fileMichal Simek1-4/+4
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever. Error look like this: drivers/crypto/Kconfig:9: warning: style: quotes recommended around 'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig' Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-03-30crypto/fsl: allow accessing Job Ring from non-TrustZoneEmanuele Ghidoli3-0/+27
Add a new kconfig option to allow non-secure world access to the CAAM Job Ring. This is needed, for example, when running linux without OP-TEE services, as it's done on Colibri iMX7. Fixes: 51f1357f3428 ("Revert "drivers/crypto/fsl: assign job-rings to non-TrustZone"") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2023-12-21global: Drop common.h inclusionTom Rini2-3/+0
In order to make it easier to move on to dropping common.h from code directly, remove common.h inclusion from the rest of the header file which had been including it. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-30Kconfig: Remove all default n/no optionsMichal Simek1-1/+0
Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all default n/no options") and again sync is required. default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
2023-09-14crypto: rsa: Remove unused NEEDS_MANUAL_RELOC code bitsMarek Vasut1-13/+0
The last user of the NEEDS_MANUAL_RELOC has been removed in commit 26af162ac8f8 ("arch: m68k: Implement relocation") Remove now unused NEEDS_MANUAL_RELOC code. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-10Correct SPL uses of HW_WATCHDOGSimon Glass2-2/+2
This converts 2 usages of this option to the non-SPL form, since there is no SPL_HW_WATCHDOG defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini2-4/+4
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-12Uboot RNG Driver using Data Co-processorKshitiz Varshney3-0/+193
This commit introduces Random number generator to uboot. It uses DCP driver for number generation. RNG driver can be invoked by using below command on uboot prompt:- rng <number of bytes> Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini3-8/+8
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-26crypto: hash: sw: fix Kconfig dependenciesBenjamin Bara1-1/+2
Fix SHA512 config name and add missing SHA384 config. Signed-off-by: Benjamin Bara <Benjamin.Bara@skidata.com>
2022-10-21crypto/fsl: fsl_rsa: Fix dcache issue in the driverYe Li1-0/+10
issue: CAAM fails with key error when perform Modular Exponentiation using PKHA Block in CAAM Fix: add flush and invalidate dcache for keys, signature and output decrypted data processed by CAAM. Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2022-09-29dm: core: Drop ofnode_is_available()Simon Glass1-1/+1
This function is also available as ofnode_is_enabled(), so use that instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-19Merge branch 'master' into nextTom Rini1-6/+16
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-18crypto/fsl: fsl_hash: Fix crash in flush dcacheGaurav Jain1-6/+16
wrong end address passed to flush_dcache_range. modified the flush_dache logic for scatter list elements. Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish) Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese2-2/+2
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-08-12Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_SYS_FSL_MAX_NUM_OF_SEC Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22crypto: nuvoton: Add NPCM7xx SHA driverJim Liu3-0/+904
add nuvoton BMC npcm750 SHA driver Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-22crypto: nuvoton: Add NPCM7xx AES driverJim Liu5-0/+313
add nuvoton BMC npcm750 AES driver Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-16crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()Stefan Roese1-6/+0
While working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! Testing and checking with Gaurav Jain from NXP has revealed, that this alignment check is not necessary here at all. So let's remove this check completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gaurav Jain <gaurav.jain@nxp.com> Cc: dullfire@yahoo.com Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-20crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finishGaurav Jain1-0/+8
HW accelerated hash operations are giving incorrect hash output. so add flush and invalidate for input/output hash buffers. Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.) Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-19i.MX8 crypto/fsl: Enable fsl CAAM rng driverGaurav Jain1-1/+7
rng driver enabled to read random number using caam. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-19i.MX6SX: crypto/fsl: fix entropy delay valueGaurav Jain1-1/+10
RNG Hardware error is reported due to incorrect entropy delay rng self test are run to determine the correct ent_dly. test is executed with different voltage and temperature to identify the worst case value for ent_dly. after adding a margin value(1000), ent_dly should be at least 12000. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21crypto/fsl: add invalidate_dcache_range for hash output bufferGaurav Jain1-6/+8
HW accelerated hash operations are giving incorrect hash output. so invalidate cache lines to avoid cache overwriting in DDR memory region. caam_hash() -moved address alignment check in the beginning of function. -added invalidate_dcache_range for pout buffer before running descriptor. Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands) Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-21crypto/fsl: Clear the memory when blob decapsulation failsGaurav Jain1-0/+4
issue: blob decapsulation operation store the decrypted data in memory even if ICV check failed. fix: clear the blob data output memory. Fixes: c5de15cbc8 (crypto/fsl: Add command for encapsulating/decapsulating blobs) Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Tested-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12crypto/fsl: i.MX8: Enable Job ring driver model.Gaurav Jain2-3/+46
i.MX8(QM/QXP) - added support for JR driver model. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12crypto/fsl: Add support for CAAM Job ring driver modelGaurav Jain3-114/+241
added device tree support for job ring driver. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-21crypto: aspeed: fix polling RSA status wrong issueNeal Liu1-1/+1
Check interrupt status to see if RSA engine is completed. After completion of the task, write-clear the status to finish operation. Add missing register base for completion. Fixes: 89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support") Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt3-6/+6
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-17crypto: aspeed: Add AST2600 ACRY supportChia-Wei Wang3-0/+201
ACRY is designed to accelerate ECC/RSA digital signature generation and verification. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17crypto: aspeed: Add AST2600 HACE supportJohnny Huang6-0/+403
Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, and symmetric-key encryption. Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-09board: fsl_validate: Fix Double free IssueKshitiz Varshney1-7/+7
Remove Double free issue from calc_img_key_hash() and calc_esbchdr_esbc_hash() function. Verified the secure boot changes using lx2162aqds board. Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk1-1/+1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-16Merge tag 'v2021.10-rc4' into nextTom Rini1-0/+2
Prepare v2021.10-rc4 Signed-off-by: Tom Rini <trini@konsulko.com> # gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # board/Arcturus/ucp1020/spl.c # cmd/mvebu/Kconfig # common/Kconfig.boot # common/image-fit.c # configs/UCP1020_defconfig # configs/sifive_unmatched_defconfig # drivers/pci/Kconfig # include/configs/UCP1020.h # include/configs/sifive-unmatched.h # lib/Makefile # scripts/config_whitelist.txt
2021-09-08image: Drop if/elseif hash selection in calculate_hash()Alexandru Gagniuc1-0/+2
calculate_hash() would try to select the appropriate hashing function by a if/elseif contruct. But that is exactly why hash_lookup_algo() exists, so use it instead. This does mean that we now have to 'select HASH' to make sure we get the hash_lookup_algo() symbol. However, the change makes sense because even basic FITs will have to deal with "hash" nodes. My only concern is that the 'select SPL_HASH' might cause some platform to grow above its SPL size allowance Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Make FSL_CAAM be implied only on ARM && SPL] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-01crypto: hash: Add software hash DM driverChia-Wei Wang3-0/+313
Add purely software-implmented drivers to support multiple hash operations including CRC, MD5, and SHA family. This driver is based on the new hash uclass. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-01dm: hash: Add new UCLASS_HASH supportChia-Wei Wang5-0/+134
Add UCLASS_HASH for hash driver development. Thus the hash drivers (SW or HW-accelerated) can be developed in the DM-based fashion. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-08-18crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversionHoria Geantă1-1/+1
One of the "dma_addr_t" instances was left out when converting to "caam_dma_addr_t". Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08crypto: fsl: refactor for 32 bit version CAAM support on ARM64Ye Li8-72/+93
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit for i.MX8M" breaks the 64 bits CAAM. Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64), to adapt and not break 64 bits CAAM support, add a new config CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t". This config is default enabled when CONFIG_PHYS_64BIT is set except for iMX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08fsl_mfgprot: Fix typo in sign_mppubk()Breno Lima1-1/+1
The signature is generated using manufacturing protection private key. Fix typo in fsl_mfgprot.c. Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.1 at 2024-07-17 23:29:18 +0000