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2019-04-12Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-bootTom Rini1-0/+2
2019-04-12stm32mp1: add trusted boot with TF-APatrick Delaunay1-0/+2
2019-04-09clk: renesas: Synchronize Gen3 tables with Linux 5.0Marek Vasut8-130/+215
2019-04-09clk: renesas: Synchronize Gen2 tables with Linux 5.0Marek Vasut4-16/+14
2019-04-09clk: renesas: Add R8A77965 clock tablesMarek Vasut4-19/+346
2019-04-01clk: sunxi: a10: Add CLK_AHB_GMACJagan Teki1-0/+2
2019-03-25clk: renesas: Add support for setting MMCIF clock divider on Gen2Marek Vasut1-0/+42
2019-03-25clk: renesas: Fix swapped div and mul in debug output on Gen2Marek Vasut1-1/+1
2019-03-25clk: renesas: Fix SDH clock divider decoding on Gen2Marek Vasut1-5/+9
2019-03-09clk: sunxi: h3: Implement EPHY CLK and RESETJagan Teki1-0/+4
2019-03-09clk: sunxi: Implement EMAC, GMAC clocks, resetsJagan Teki6-0/+15
2019-03-09clk: sunxi: Implement A10 EMAC clocksJagan Teki2-0/+2
2019-03-04clk: sunxi: Implement SPI clocks, resetsJagan Teki11-0/+97
2019-02-28Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini1-10/+0
2019-02-27clk: Add fixed-factor clock driverAnup Patel2-1/+77
2019-02-27clk: Add SiFive FU540 PRCI clock driverAnup Patel7-0/+1121
2019-02-25clk: rmobile: Drop def_bool per SoCMarek Vasut1-10/+0
2019-02-09clk: stm32mp1: correctly handle Clock Spreading GeneratorPatrick Delaunay1-1/+7
2019-02-09clk: stm32mp1: add debug informationPatrick Delaunay1-4/+79
2019-02-09clk: stm32mp1: recalculate counter when switching freqPatrick Delaunay1-2/+7
2019-02-09clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRRPatrick Delaunay1-8/+5
2019-02-09clk: stm32mp1: add IPCC clockPatrick Delaunay1-0/+1
2019-02-09clk: stm32mp1: no more get ck_usbo_48m in device treePatrick Delaunay1-3/+3
2019-02-01rockchip: clk: Add mention of four new clocksSimon Glass1-0/+12
2019-02-01clk: Improve debug message in clk_set_default_rates()Simon Glass1-2/+2
2019-02-01rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass1-0/+48
2019-01-30sunxi: clk: enable clk and reset for CCU devicesAndre Przywara1-0/+12
2019-01-29sunxi: clk: A80: add MMC clock supportAndre Przywara1-1/+27
2019-01-29sunxi: clk: add MMC gates/resetsAndre Przywara11-0/+63
2019-01-18clk: sunxi: Add Allwinner A80 CLK driverJagan Teki3-0/+65
2019-01-18clk: sunxi: Add Allwinner H6 CLK driverJagan Teki3-0/+61
2019-01-18clk: sunxi: Implement UART resetsJagan Teki7-0/+43
2019-01-18clk: sunxi: Implement UART clocksJagan Teki9-0/+57
2019-01-18clk: sunxi: Add Allwinner V3S CLK driverJagan Teki3-0/+59
2019-01-18clk: sunxi: Add Allwinner R40 CLK driverJagan Teki3-0/+78
2019-01-18clk: sunxi: Add Allwinner A83T CLK driverJagan Teki3-0/+71
2019-01-18clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki3-0/+71
2019-01-18clk: sunxi: Add Allwinner A31 CLK driverJagan Teki3-0/+76
2019-01-18clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki3-0/+64
2019-01-18clk: sunxi: Add Allwinner A10/A20 CLK driverJagan Teki3-0/+67
2019-01-18clk: sunxi: Add Allwinner H3/H5 CLK driverJagan Teki3-0/+87
2019-01-18reset: Add Allwinner RESET driverJagan Teki2-0/+21
2019-01-18clk: Add Allwinner A64 CLK driverJagan Teki6-0/+149
2019-01-14clk: MediaTek: bind ethsys reset controllerWeijie Gao3-0/+32
2019-01-09clk: imx8: fix build warningPeng Fan1-0/+2
2018-12-29clk: uniphier: add NAND 200MHz clockMasahiro Yamada1-3/+5
2018-12-06clk: stm32: add hardware spinlock clockBenjamin Gaignard1-0/+3
2018-12-06clk: Allow clock defaults to be set during re-reloc state for SPL onlyPhilipp Tomsich1-0/+4
2018-12-03Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini1-7/+3
2018-12-03ARM: meson: Add regmap support for clock driverLoic Devulder1-29/+30