clk: Allow clock defaults to be set during re-reloc state for SPL only

In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed.  While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.

With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).

This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.

References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 04b369a..6d7a514 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -243,6 +243,10 @@ int clk_set_defaults(struct udevice *dev)
 {
 	int ret;
 
+	/* If this not in SPL and pre-reloc state, don't take any action. */
+	if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
+		return 0;
+
 	debug("%s(%s)\n", __func__, dev_read_name(dev));
 
 	ret = clk_set_default_parents(dev);