rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin	1	-128/+0
2022-10-20	riscv: andes_plic.c: use modified IPI scheme	Yu Chien Peter Lin	1	-3/+4
2022-09-29	dm: core: Drop ofnode_is_available()	Simon Glass	1	-1/+1
2021-06-17	riscv: andes_plic: Fix riscv_get_ipi() mask	Bin Meng	1	-1/+3
2021-02-02	common: Drop asm/global_data.h from common header	Simon Glass	1	-0/+1
2020-09-30	riscv: Clean up initialization in Andes PLIC	Sean Anderson	1	-33/+25
2020-08-14	riscv: remove redundant logical constraint.	Heinrich Schuchardt	1	-1/+1
2020-07-01	riscv: Clean up IPI initialization code	Sean Anderson	1	-22/+12
2020-02-05	dm: core: Require users of devres to include the header	Simon Glass	1	-0/+1
2019-12-10	riscv: add functions for reading the IPI status	Lukas Auer	1	-0/+11
2019-12-10	riscv: andes_plic: Fix some wrong configurations	Rick Chen	1	-4/+7
2019-09-03	riscv: andes_plic: init plic by scanning each cpu node	Rick Chen	1	-11/+25
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLIC	Rick Chen	1	-0/+113