rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-18	Revert "Merge patch series "pxe: Allow extlinux booting without CMDLINE enabl...	Tom Rini	1	-1/+1
2024-04-10	treewide: Make arch-specific bootm code depend on BOOTM	Simon Glass	1	-1/+1
2023-10-19	riscv: Add Zbb support for building U-Boot	Yu Chien Peter Lin	1	-0/+3
2023-07-12	riscv: Rename SiFive CLINT to RISC-V ALINT	Bin Meng	1	-1/+1
2022-12-08	arch/riscv: add semihosting support for RISC-V	Kautuk Consul	1	-0/+2
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin	1	-1/+1
2021-09-07	riscv: lib: implement enable_caches for sifive cache	Zong Li	1	-0/+1
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng	1	-1/+1
2021-04-20	Add support for stack-protector	Joel Peshkin	1	-0/+1
2021-04-08	riscv: assembler versions of memcpy, memmove, memset	Heinrich Schuchardt	1	-0/+4
2020-10-26	riscv: Move Andes PLMT driver to drivers/timer	Sean Anderson	1	-1/+0
2020-09-30	riscv: Rework riscv timer driver to only support S-mode	Sean Anderson	1	-1/+0
2020-07-03	riscv: Do not build reset.c if SYSRESET is on	Bin Meng	1	-0/+2
2020-04-23	riscv: Provide a mechanism to fix DT for reserved memory	Atish Patra	1	-0/+1
2020-04-23	riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL	Bin Meng	1	-1/+1
2020-03-17	riscv: Add basic support for SBI v0.2	Bin Meng	1	-0/+1
2019-08-26	riscv: add SPL support	Lukas Auer	1	-0/+1
2019-08-26	riscv: add run mode configuration for SPL	Lukas Auer	1	-2/+5
2019-05-09	RISCV: image: Add booti support	Atish Patra	1	-0/+1
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLMT	Rick Chen	1	-0/+1
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLIC	Rick Chen	1	-0/+1
2019-04-08	riscv: implement IPI platform functions using SBI	Lukas Auer	1	-0/+1
2019-04-08	riscv: add infrastructure for calling functions on other harts	Lukas Auer	1	-0/+1
2018-12-18	riscv: Implement riscv_get_time() API using rdtime instruction	Anup Patel	1	-0/+1
2018-12-18	riscv: Add a SYSCON driver for SiFive's Core Local Interruptor	Bin Meng	1	-0/+1
2018-10-03	riscv: Move do_reset() to a common place	Bin Meng	1	-0/+1
2018-05-29	riscv: Add EFI application infrastructure	Alexander Graf	1	-0/+11
2018-05-29	riscv: Add setjmp/longjmp code	Alexander Graf	1	-0/+1
2018-05-07	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	1	-3/+1
2018-01-12	riscv: nx25: lib: Add relative lib funcs to support RISC-V	Rick Chen	1	-0/+14