rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-09	riscv: support extension probing using riscv, isa-extensions	Conor Dooley	1	-21/+35
2024-04-09	riscv: don't read riscv, isa in the riscv cpu's get_desc()	Conor Dooley	1	-5/+7
2024-03-12	riscv: cpu: improve multi-letter extension detection in supports_extension()	Conor Dooley	1	-6/+16
2023-12-21	riscv: Add a reset_cpu() function	Simon Glass	1	-0/+13
2023-10-24	riscv: Remove common.h usage	Tom Rini	1	-1/+0
2023-09-06	riscv: Correct event usage for riscv_cpu_probe/setup	Tom Rini	1	-5/+1
2023-09-06	riscv: Rework riscv_cpu_probe for current event macros	Tom Rini	1	-2/+2
2023-09-04	Merge tag 'v2023.10-rc4' into next	Tom Rini	1	-8/+3
2023-08-31	event: Convert existing spy records to simple	Simon Glass	1	-2/+2
2023-08-22	riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback	Chanho Park	1	-8/+3
2023-05-11	dm: Emit the arch_cpu_init_dm() even only before relocation	Simon Glass	1	-1/+1
2023-02-01	riscv: cpu: check U-Mode before counteren write	Nikita Shubin	1	-8/+8
2022-11-15	riscv: Fix detecting FPU support in standard extension	Yu Chien Peter Lin	1	-3/+11
2022-09-26	riscv: Introduce AVAILABLE_HARTS	Rick Chen	1	-0/+2
2022-09-26	spl: introduce SPL_XIP to config	Nikita Shubin	1	-1/+1
2022-03-10	event: Convert arch_cpu_init_dm() to use events	Simon Glass	1	-1/+4
2021-10-18	riscv: Remove OF_PRIOR_STAGE from RISC-V boards	Ilias Apalodimas	1	-3/+0
2021-10-07	sysreset: provide SBI based sysreset driver	Heinrich Schuchardt	1	-1/+12
2021-05-24	treewide: Convert macro and uses of __section(foo) to __section("foo")	Marek Behún	1	-2/+2
2021-05-05	riscv: cpu: Add callback to init each core	Green Wan	1	-0/+11
2020-09-30	riscv: Clear pending IPIs on initialization	Sean Anderson	1	-0/+20
2020-07-24	riscv: Make SiFive HiFive Unleashed board boot again	Bin Meng	1	-1/+1
2020-07-01	riscv: Add option to support RISC-V privileged spec 1.9	Sean Anderson	1	-0/+9
2020-07-01	riscv: Clean up IPI initialization code	Sean Anderson	1	-0/+6
2020-05-18	common: Drop linux/bitops.h from common header	Simon Glass	1	-0/+1
2020-05-18	common: Drop init.h from common header	Simon Glass	1	-0/+1
2019-08-26	riscv: add run mode configuration for SPL	Lukas Auer	1	-3/+3
2019-08-15	riscv: Access CSRs using CSR numbers	Bin Meng	1	-5/+4
2019-05-09	riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...	Rick Chen	1	-0/+2
2019-05-09	riscv: Introduce CONFIG_XIP to support booting from flash	Rick Chen	1	-0/+2
2019-04-08	riscv: add support for multi-hart systems	Lukas Auer	1	-1/+8
2018-12-18	riscv: Do some basic architecture level cpu initialization	Bin Meng	1	-1/+26
2018-12-18	riscv: Update supports_extension() to use desc from cpu driver	Bin Meng	1	-0/+26
2018-12-18	riscv: Remove non-DM version of print_cpuinfo()	Bin Meng	1	-37/+0
2018-12-18	riscv: Probe cpus during boot	Bin Meng	1	-0/+26
2018-11-26	riscv: save hart ID and device tree passed by prior boot stage	Lukas Auer	1	-0/+6
2018-10-03	riscv: Add a helper routine to print CPU information	Bin Meng	1	-0/+49