diff options
Diffstat (limited to 'drivers/clk/rockchip')
-rw-r--r-- | drivers/clk/rockchip/clk_pll.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_px30.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3036.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3066.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3128.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3188.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk322x.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3288.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3308.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3328.c | 5 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3368.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3399.c | 68 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3568.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rk3588.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rv1108.c | 1 | ||||
-rw-r--r-- | drivers/clk/rockchip/clk_rv1126.c | 1 |
16 files changed, 83 insertions, 4 deletions
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c index 44c6f14..66f8bb1 100644 --- a/drivers/clk/rockchip/clk_pll.c +++ b/drivers/clk/rockchip/clk_pll.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd */ + #include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index d7825c6..2875c15 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 274428f..6238b14 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <errno.h> diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index f7dea78..f83335d 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -5,6 +5,7 @@ */ #include <bitfield.h> +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <dt-structs.h> diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c index a072855..182754e 100644 --- a/drivers/clk/rockchip/clk_rk3128.c +++ b/drivers/clk/rockchip/clk_rk3128.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <errno.h> diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index f569a10..f98b46a 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -4,6 +4,7 @@ * (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de> */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <dt-structs.h> diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index 9b71fd8..9371c4f 100644 --- a/drivers/clk/rockchip/clk_rk322x.c +++ b/drivers/clk/rockchip/clk_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <errno.h> diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 432a792..0b7eefa 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Google, Inc */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <div64.h> diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index e73bb67..8616483 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2017-2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index 4b94d63..314b903 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> @@ -705,6 +706,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk) case PCLK_HDMIPHY: rate = rk3328_hdmiphy_get_clk(priv->cru); break; + case SCLK_USB3OTG_REF: + rate = OSC_HZ; + break; default: return -ENOENT; } @@ -779,6 +783,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case PCLK_DDR: case ACLK_GMAC: case PCLK_GMAC: + case SCLK_USB3OTG_REF: case SCLK_USB3OTG_SUSPEND: case USB480M: return 0; diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index d894398..1c5dfaa 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <dt-structs.h> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index cc414c3..67b2c05 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -4,6 +4,7 @@ * (C) 2017 Theobroma Systems Design und Consulting GmbH */ +#include <common.h> #include <clk-uclass.h> #include <dm.h> #include <dt-structs.h> @@ -925,6 +926,26 @@ static ulong rk3399_saradc_set_clk(struct rockchip_cru *cru, uint hz) return rk3399_saradc_get_clk(cru); } +static ulong rk3399_pciephy_get_clk(struct rockchip_cru *cru) +{ + if (readl(&cru->clksel_con[18]) & BIT(10)) + return 100 * MHz; + else + return OSC_HZ; +} + +static ulong rk3399_pciephy_set_clk(struct rockchip_cru *cru, uint hz) +{ + if (hz == 100 * MHz) + rk_setreg(&cru->clksel_con[18], BIT(10)); + else if (hz == OSC_HZ) + rk_clrreg(&cru->clksel_con[18], BIT(10)); + else + return -EINVAL; + + return rk3399_pciephy_get_clk(cru); +} + static ulong rk3399_clk_get_rate(struct clk *clk) { struct rk3399_clk_priv *priv = dev_get_priv(clk->dev); @@ -955,7 +976,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case SCLK_UART1: case SCLK_UART2: case SCLK_UART3: - return 24000000; + case SCLK_USB3OTG0_REF: + case SCLK_USB3OTG1_REF: + return OSC_HZ; case PCLK_HDMI_CTRL: break; case DCLK_VOP0: @@ -966,10 +989,14 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case SCLK_SARADC: rate = rk3399_saradc_get_clk(priv->cru); break; + case SCLK_PCIEPHY_REF: + rate = rk3399_pciephy_get_clk(priv->cru); + break; case ACLK_VIO: case ACLK_HDCP: case ACLK_GIC_PRE: case PCLK_DDR: + case ACLK_VDU: break; case PCLK_ALIVE: case PCLK_WDT: @@ -1048,7 +1075,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) * return 0 to satisfy clk_set_defaults during device probe. */ return 0; - case SCLK_DDRCLK: + case SCLK_DDRC: ret = rk3399_ddr_set_clk(priv->cru, rate); break; case PCLK_EFUSE1024NS: @@ -1056,10 +1083,14 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case SCLK_SARADC: ret = rk3399_saradc_set_clk(priv->cru, rate); break; + case SCLK_PCIEPHY_REF: + ret = rk3399_pciephy_set_clk(priv->cru, rate); + break; case ACLK_VIO: case ACLK_HDCP: case ACLK_GIC_PRE: case PCLK_DDR: + case ACLK_VDU: return 0; default: log_debug("Unknown clock %lu\n", clk->id); @@ -1105,12 +1136,39 @@ static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, return -EINVAL; } +static int __maybe_unused rk3399_pciephy_set_parent(struct clk *clk, + struct clk *parent) +{ + struct rk3399_clk_priv *priv = dev_get_priv(clk->dev); + const char *clock_output_name; + int ret; + + if (parent->dev == clk->dev && parent->id == SCLK_PCIEPHY_REF100M) { + rk_setreg(&priv->cru->clksel_con[18], BIT(10)); + return 0; + } + + ret = dev_read_string_index(parent->dev, "clock-output-names", + parent->id, &clock_output_name); + if (ret < 0) + return -ENODATA; + + if (!strcmp(clock_output_name, "xin24m")) { + rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); + return 0; + } + + return -EINVAL; +} + static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, struct clk *parent) { switch (clk->id) { case SCLK_RMII_SRC: return rk3399_gmac_set_parent(clk, parent); + case SCLK_PCIEPHY_REF: + return rk3399_pciephy_set_parent(clk, parent); } debug("%s: unsupported clk %ld\n", __func__, clk->id); @@ -1201,7 +1259,8 @@ static int rk3399_clk_enable(struct clk *clk) rk_clrreg(&priv->cru->clkgate_con[13], BIT(7)); break; case SCLK_PCIEPHY_REF: - rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); + if (readl(&priv->cru->clksel_con[18]) & BIT(10)) + rk_clrreg(&priv->cru->clkgate_con[12], BIT(6)); break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); @@ -1295,7 +1354,8 @@ static int rk3399_clk_disable(struct clk *clk) rk_setreg(&priv->cru->clkgate_con[13], BIT(7)); break; case SCLK_PCIEPHY_REF: - rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); + if (readl(&priv->cru->clksel_con[18]) & BIT(10)) + rk_setreg(&priv->cru->clkgate_con[12], BIT(6)); break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 3556350..24eeca8 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -4,6 +4,7 @@ * Author: Elaine Zhang <zhangqing@rock-chips.com> */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index ceae08a..4c611a3 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -4,6 +4,7 @@ * Author: Elaine Zhang <zhangqing@rock-chips.com> */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index 75202a6..fc442f7 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -4,6 +4,7 @@ * Author: Andy Yan <andy.yan@rock-chips.com> */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c index aeeea95..cfdfcbd 100644 --- a/drivers/clk/rockchip/clk_rv1126.c +++ b/drivers/clk/rockchip/clk_rv1126.c @@ -5,6 +5,7 @@ * Author: Finley Xiao <finley.xiao@rock-chips.com> */ +#include <common.h> #include <bitfield.h> #include <clk-uclass.h> #include <dm.h> |