diff options
| -rw-r--r-- | arch/arm/dts/armada-8040-mcbin.dts | 2 | ||||
| -rw-r--r-- | drivers/phy/marvell/comphy_core.c | 14 | ||||
| -rw-r--r-- | drivers/phy/marvell/comphy_cp110.c | 3 | ||||
| -rw-r--r-- | include/dt-bindings/comphy/comphy_data.h | 50 |
4 files changed, 27 insertions, 42 deletions
diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts index 98a582d..a6ef401 100644 --- a/arch/arm/dts/armada-8040-mcbin.dts +++ b/arch/arm/dts/armada-8040-mcbin.dts @@ -302,7 +302,7 @@ phy-type = <COMPHY_TYPE_SFI>; }; phy5 { - phy-type = <COMPHY_TYPE_SGMII3>; + phy-type = <COMPHY_TYPE_SGMII2>; phy-speed = <COMPHY_SPEED_3_125G>; }; }; diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index 45dba73..9293607 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -24,9 +24,8 @@ DECLARE_GLOBAL_DATA_PTR; static const char *get_speed_string(u32 speed) { static const char * const speed_strings[] = { - "1.25 Gbps", "1.5 Gbps", "2.5 Gbps", - "3.0 Gbps", "3.125 Gbps", "5 Gbps", - "5.125 Gpbs", "6 Gbps", "6.25 Gbps", + "1.25 Gbps", "2.5 Gbps", "3.125 Gbps", + "5 Gbps", "5.125 Gpbs", "6 Gbps", "10.3125 Gbps" }; @@ -40,11 +39,10 @@ static const char *get_type_string(u32 type) { static const char * const type_strings[] = { "UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3", - "SATA0", "SATA1", "SATA2", "SATA3", "SGMII0", - "SGMII1", "SGMII2", "SGMII3", "QSGMII", "USB3" - "USB3_HOST0", "USB3_HOST1", "USB3_DEVICE", - "XAUI0", "XAUI1", "XAUI2", "XAUI3", - "RXAUI0", "RXAUI1", "SFI", "IGNORE" + "SATA0", "SATA1", "SGMII0", "SGMII1", "SGMII2", + "USB3", "USB3_HOST0", "USB3_HOST1", + "USB3_DEVICE", "RXAUI0", "RXAUI1", "SFI", "AP", + "IGNORE" }; if (type < 0 || type > COMPHY_TYPE_MAX) diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index 11dc46b..620a749 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -1130,8 +1130,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, break; case COMPHY_TYPE_SATA0: case COMPHY_TYPE_SATA1: - case COMPHY_TYPE_SATA2: - case COMPHY_TYPE_SATA3: mode = COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE); ret = comphy_sata_power_up(lane, hpipe_base_addr, comphy_base_addr, @@ -1166,7 +1164,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, mode); break; case COMPHY_TYPE_SGMII2: - case COMPHY_TYPE_SGMII3: if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) { debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n", lane); diff --git a/include/dt-bindings/comphy/comphy_data.h b/include/dt-bindings/comphy/comphy_data.h index 7d62dcf..8e92705 100644 --- a/include/dt-bindings/comphy/comphy_data.h +++ b/include/dt-bindings/comphy/comphy_data.h @@ -7,16 +7,13 @@ #define _COMPHY_DATA_H_ #define COMPHY_SPEED_1_25G 0 -#define COMPHY_SPEED_1_5G 1 -#define COMPHY_SPEED_2_5G 2 -#define COMPHY_SPEED_3G 3 -#define COMPHY_SPEED_3_125G 4 -#define COMPHY_SPEED_5G 5 -#define COMPHY_SPEED_5_15625G 6 -#define COMPHY_SPEED_6G 7 -#define COMPHY_SPEED_6_25G 8 -#define COMPHY_SPEED_10_3125G 9 -#define COMPHY_SPEED_MAX 10 +#define COMPHY_SPEED_2_5G 1 +#define COMPHY_SPEED_3_125G 2 +#define COMPHY_SPEED_5G 3 +#define COMPHY_SPEED_5_15625G 4 +#define COMPHY_SPEED_6G 5 +#define COMPHY_SPEED_10_3125G 6 +#define COMPHY_SPEED_MAX 7 #define COMPHY_SPEED_INVALID 0xff #define COMPHY_TYPE_UNCONNECTED 0 @@ -26,26 +23,19 @@ #define COMPHY_TYPE_PEX3 4 #define COMPHY_TYPE_SATA0 5 #define COMPHY_TYPE_SATA1 6 -#define COMPHY_TYPE_SATA2 7 -#define COMPHY_TYPE_SATA3 8 -#define COMPHY_TYPE_SGMII0 9 -#define COMPHY_TYPE_SGMII1 10 -#define COMPHY_TYPE_SGMII2 11 -#define COMPHY_TYPE_SGMII3 12 -#define COMPHY_TYPE_QSGMII 13 -#define COMPHY_TYPE_USB3 14 -#define COMPHY_TYPE_USB3_HOST0 15 -#define COMPHY_TYPE_USB3_HOST1 16 -#define COMPHY_TYPE_USB3_DEVICE 17 -#define COMPHY_TYPE_XAUI0 18 -#define COMPHY_TYPE_XAUI1 19 -#define COMPHY_TYPE_XAUI2 20 -#define COMPHY_TYPE_XAUI3 21 -#define COMPHY_TYPE_RXAUI0 22 -#define COMPHY_TYPE_RXAUI1 23 -#define COMPHY_TYPE_SFI 24 -#define COMPHY_TYPE_IGNORE 25 -#define COMPHY_TYPE_MAX 26 +#define COMPHY_TYPE_SGMII0 7 +#define COMPHY_TYPE_SGMII1 8 +#define COMPHY_TYPE_SGMII2 9 +#define COMPHY_TYPE_USB3 10 +#define COMPHY_TYPE_USB3_HOST0 11 +#define COMPHY_TYPE_USB3_HOST1 12 +#define COMPHY_TYPE_USB3_DEVICE 13 +#define COMPHY_TYPE_RXAUI0 14 +#define COMPHY_TYPE_RXAUI1 15 +#define COMPHY_TYPE_SFI 16 +#define COMPHY_TYPE_AP 17 +#define COMPHY_TYPE_IGNORE 18 +#define COMPHY_TYPE_MAX 19 #define COMPHY_TYPE_INVALID 0xff #define COMPHY_POLARITY_NO_INVERT 0 |