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| author | Michal Simek <michal.simek@xilinx.com> | 2018-06-14 09:43:34 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-06-15 08:54:05 +0200 |
| commit | e90d2659e46ab9483c24e08611c06922a8ec25d4 (patch) | |
| tree | 7f163cb75a279c0fbfc8d4310a8d90d2660ae2e0 /drivers/serial | |
| parent | c9a2c47b91b0334e7c7f5aaa0421ba7d751edbef (diff) | |
| download | u-boot-e90d2659e46ab9483c24e08611c06922a8ec25d4.zip u-boot-e90d2659e46ab9483c24e08611c06922a8ec25d4.tar.gz u-boot-e90d2659e46ab9483c24e08611c06922a8ec25d4.tar.bz2 | |
serial: zynq: Write chars till output fifo is full
Change logic and put char to fifo till there is a space in output fifo.
Origin logic was that output fifo needs to be empty. It means only one
char was in output queue.
Also remove unused ZYNQ_UART_SR_TXEMPTY macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_zynq.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 7a6f822..4ae2493 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -15,8 +15,8 @@ #include <linux/compiler.h> #include <serial.h> -#define ZYNQ_UART_SR_TXEMPTY BIT(3) /* TX FIFO empty */ #define ZYNQ_UART_SR_TXACTIVE BIT(11) /* TX active */ +#define ZYNQ_UART_SR_TXFULL BIT(4) /* TX FIFO full */ #define ZYNQ_UART_SR_RXEMPTY BIT(1) /* RX FIFO empty */ #define ZYNQ_UART_CR_TX_EN BIT(4) /* TX enabled */ @@ -93,7 +93,7 @@ static void _uart_zynq_serial_init(struct uart_zynq *regs) static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c) { - if (!(readl(®s->channel_sts) & ZYNQ_UART_SR_TXEMPTY)) + if (readl(®s->channel_sts) & ZYNQ_UART_SR_TXFULL) return -EAGAIN; writel(c, ®s->tx_rx_fifo); |