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| author | Wasim Khan <wasim.khan@nxp.com> | 2020-09-28 16:26:14 +0530 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-12-10 13:56:39 +0530 |
| commit | 1255f8bc36101400fd16fc4898f9dd9fdccbbc2e (patch) | |
| tree | 2da3cc8f7989f6338907a74abe8e7de1e026652e /drivers/pci | |
| parent | 49df7c90867c0a991222f6a4eac8e42879880c23 (diff) | |
| download | u-boot-1255f8bc36101400fd16fc4898f9dd9fdccbbc2e.zip u-boot-1255f8bc36101400fd16fc4898f9dd9fdccbbc2e.tar.gz u-boot-1255f8bc36101400fd16fc4898f9dd9fdccbbc2e.tar.bz2 | |
pci: ls_pcie_g4: Add size check for config resource
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pcie_layerscape_gen4.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c index 0226bde..6e71173 100644 --- a/drivers/pci/pcie_layerscape_gen4.c +++ b/drivers/pci/pcie_layerscape_gen4.c @@ -455,6 +455,7 @@ static int ls_pcie_g4_probe(struct udevice *dev) u32 link_ctrl_sta; u32 val; int ret; + fdt_size_t cfg_size; pcie->bus = dev; @@ -488,6 +489,13 @@ static int ls_pcie_g4_probe(struct udevice *dev) return ret; } + cfg_size = fdt_resource_size(&pcie->cfg_res); + if (cfg_size < SZ_4K) { + printf("PCIe%d: %s Invalid size(0x%llx) for resource \"config\",expected minimum 0x%x\n", + PCIE_SRDS_PRTCL(pcie->idx), dev->name, cfg_size, SZ_4K); + return 0; + } + pcie->cfg = map_physmem(pcie->cfg_res.start, fdt_resource_size(&pcie->cfg_res), MAP_NOCACHE); |