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| author | Tom Rini <trini@konsulko.com> | 2023-06-12 16:42:37 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-06-12 16:42:37 -0400 |
| commit | 7da82de916d6aaeeef62431810cb3335e1207b28 (patch) | |
| tree | 9d994cb47482d2679acd701ebb09d0caf4b2122f /arch/arm/include/asm | |
| parent | 260d4962e06c0a7d2713523c131416a3f70d7f2c (diff) | |
| parent | 89240bc0c44b985e461a4220475cb462263df5be (diff) | |
| download | u-boot-7da82de916d6aaeeef62431810cb3335e1207b28.zip u-boot-7da82de916d6aaeeef62431810cb3335e1207b28.tar.gz u-boot-7da82de916d6aaeeef62431810cb3335e1207b28.tar.bz2 | |
Merge tag 'xilinx-for-v2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/12Jun2023-next
Xilinx changes for v2023.10-rc1
global:
- Use proper U-Boot project name
Fix sparse warnings in zynqmp-clk, zynqmp handoff, board
cmd:
- Cover incorrect 0 length entries
Versal NET:
- Add bootmode logic
- Support SPP production version
- Add loadpdi command
ZynqMP:
- Clear pmufw node command ID handling
- Change power domain behavior around zynqmp_pmufw_node()
- Fix zynqmp cmd return values and pmufw command
- Fix R5 tcm init and modes
mmc:
- Sync Versal NET emmc DT binding
pcie:
- Add support for ZynqMP PCIe root port
video:
- Add support for ZynqMP DP
tools:
- Fix debug message in relocate-rela
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h index 1b02d48..c18c51e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -22,7 +22,7 @@ * * -PCIe * -there is a range of stream IDs set aside for PCI in this - * file. U-boot will scan the PCI bus and for each device discovered: + * file. U-Boot will scan the PCI bus and for each device discovered: * -allocate a streamID * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID' * -set a msi-map entry in the PEXn controller node in the diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h index b36b6d38..140849d 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h @@ -23,7 +23,7 @@ * * -PCIe * -there is a range of stream IDs set aside for PCI in this - * file. U-boot will scan the PCI bus and for each device discovered: + * file. U-Boot will scan the PCI bus and for each device discovered: * -allocate a streamID * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID' * -set a msi-map entry in the PEXn controller node in the |