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| author | Marc Zyngier <maz@kernel.org> | 2023-03-18 00:22:52 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-04-25 15:31:27 -0400 |
| commit | 836b8d4b205d2175b57cb9ef271e638b0c116e89 (patch) | |
| tree | f057d0af7248d9817c2e254dbbd9163965c36439 /arch/arm/cpu | |
| parent | 6cdf6b7a340db4ddd008516181de7e08e3f8c213 (diff) | |
| download | u-boot-836b8d4b205d2175b57cb9ef271e638b0c116e89.zip u-boot-836b8d4b205d2175b57cb9ef271e638b0c116e89.tar.gz u-boot-836b8d4b205d2175b57cb9ef271e638b0c116e89.tar.bz2 | |
arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/cache_v8.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 4760064..4c6a1b1 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -314,7 +314,7 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, for (i = idx; size; i++) { u64 next_size, *next_table; - if (level >= 1 && + if (level >= gd->arch.first_block_level && size >= map_size && !(virt & (map_size - 1))) { if (level == 3) table[i] = phys | attrs | PTE_TYPE_PAGE; @@ -353,6 +353,9 @@ static void add_map(struct mm_region *map) if (va_bits < 39) level = 1; + if (!gd->arch.first_block_level) + gd->arch.first_block_level = 1; + if (gd->arch.has_hafdbs) attrs |= PTE_DBM | PTE_RDONLY; @@ -369,7 +372,7 @@ static void count_range(u64 virt, u64 size, int level, int *cntp) for (i = idx; size; i++) { u64 next_size; - if (level >= 1 && + if (level >= gd->arch.first_block_level && size >= map_size && !(virt & (map_size - 1))) { virt += map_size; size -= map_size; @@ -410,10 +413,13 @@ __weak u64 get_page_table_size(void) u64 size, mmfr1; asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1)); - if ((mmfr1 & 0xf) == 2) + if ((mmfr1 & 0xf) == 2) { gd->arch.has_hafdbs = true; - else + gd->arch.first_block_level = 2; + } else { gd->arch.has_hafdbs = false; + gd->arch.first_block_level = 1; + } /* Account for all page tables we would need to cover our memory map */ size = one_pt * count_ranges(); |