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-rw-r--r--arch/arm/cpu/armv8/cache_v8.c14
-rw-r--r--arch/arm/include/asm/global_data.h1
2 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 4760064..4c6a1b1 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -314,7 +314,7 @@ static void map_range(u64 virt, u64 phys, u64 size, int level,
for (i = idx; size; i++) {
u64 next_size, *next_table;
- if (level >= 1 &&
+ if (level >= gd->arch.first_block_level &&
size >= map_size && !(virt & (map_size - 1))) {
if (level == 3)
table[i] = phys | attrs | PTE_TYPE_PAGE;
@@ -353,6 +353,9 @@ static void add_map(struct mm_region *map)
if (va_bits < 39)
level = 1;
+ if (!gd->arch.first_block_level)
+ gd->arch.first_block_level = 1;
+
if (gd->arch.has_hafdbs)
attrs |= PTE_DBM | PTE_RDONLY;
@@ -369,7 +372,7 @@ static void count_range(u64 virt, u64 size, int level, int *cntp)
for (i = idx; size; i++) {
u64 next_size;
- if (level >= 1 &&
+ if (level >= gd->arch.first_block_level &&
size >= map_size && !(virt & (map_size - 1))) {
virt += map_size;
size -= map_size;
@@ -410,10 +413,13 @@ __weak u64 get_page_table_size(void)
u64 size, mmfr1;
asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1));
- if ((mmfr1 & 0xf) == 2)
+ if ((mmfr1 & 0xf) == 2) {
gd->arch.has_hafdbs = true;
- else
+ gd->arch.first_block_level = 2;
+ } else {
gd->arch.has_hafdbs = false;
+ gd->arch.first_block_level = 1;
+ }
/* Account for all page tables we would need to cover our memory map */
size = one_pt * count_ranges();
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 6956182..0c13075 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -52,6 +52,7 @@ struct arch_global_data {
#if defined(CONFIG_ARM64)
unsigned long tlb_fillptr;
unsigned long tlb_emerg;
+ unsigned int first_block_level;
bool has_hafdbs;
#endif
#endif