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2023-11-16firmware: fw_base.S: Fix boot hart status synchronizationGuo Ren1-4/+4
It's wrong to put the fence after setting the boot status flag because all relocation operations must be finished before setting the status flag. So, this fence must be put before the setting status flag, and there is no use in putting a fence between _start_warm and setting status flag. Also, nop can't delay other harts too much, so use div instead, just like Linux cpu_relax. Current opensbi force enables “M” Standard Extension, and mul instructions have been used in the fw_base.S. After the above two fixes, the boot hart index param of the fw_dynamic_info could be guaranteed properly for all platforms. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-10-06firmware: Remove handling of R_RISCV_{32,64}Vivian Wang2-28/+0
Since everything is statically linked, we won't actually have R_RISCV_{32,64} relocations. No need to handle these. Fixes: 0f20e8adcf42 ("firmware: Support position independent execution") Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-10-06firmware: Remove ALIGN in .rela.dyn in linker scriptVivian Wang1-1/+0
The .rela.dyn section should be exactly the size of the relocations, without padding. On RV64, .rela* sections are already aligned and there's no need for padding. On RV32, this adds padding up to 4 bytes, which, if present, confuses the relocation loop into processing an extra entry past the end of .rela*, and it crashes with an invalid memory access. Fixes: 0f20e8adcf42 ("firmware: Support position independent execution") Signed-off-by: Vivian Wang <dramforever@live.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-09-06firmware: payload: test: Change to SBI v2.0 DBCN ecallsInochi Amaoto1-21/+32
As the the "Console Putchar" extension is already legacy and may be removed in the furture. So replace it with the SBI v2.0 "DBCN" extension. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-08-06fw_base.S: Fix assembler error with clang 16+Mitchell Horne1-4/+2
Attempting to build OpenSBI with clang 16 and the following command: $ make LLVM=1 PLATFORM=generic Results in the following error: AS platform/generic/firmware/fw_dynamic.o /tmp/fw_dynamic-d000a6.s:429:9: error: symbol '_fw_start' can not be undefined in a subtraction expression .dword _fw_rw_start - _fw_start Work around this issue by eliminating the __fw_rw_offset variable and performing the offset calculation at run-time instead. This takes advantage of the fact that the a4 register contains the value of _fw_start. Signed-off-by: Mitchell Horne <mhorne@FreeBSD.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-06-21firmware: Fix find hart indexXiang W1-1/+0
After the loop to find the hartid is launched, assigning -1 to index will fail in the subsequent compare instruction bge. Fix This. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-06-05platform: Allow platforms to specify heap sizeAnup Patel1-0/+15
We extend struct sbi_platform and struct sbi_scratch to allow platforms specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares will use this information to determine the location of heap and provide heap base address in per-HART scratch space. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
2023-04-17firmware: Change to use positive offset to access relocation entriesBin Meng1-8/+7
The codes currently skip the very first relocation entry, but later reference the elements in the relocation entry using minus offsets. Change to use positive offsets so that there is no need to skip the first relocation entry. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Xiang W <wxjstz@126.com>
2023-04-17firmware: Optimize loading relocation typeBin Meng1-1/+0
't5' already contains relocation type so don't bother reloading it. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Xiang W <wxjstz@126.com>
2023-04-06lib: sbi_hart: clear mip csr during hart initMayuresh Chitale1-7/+0
If mip.SEIP bit is not cleared then on HiFive Unmatched board it causes spurious external interrupts. This breaks the boot up of HiFive Unmatched board. Hence it is required to bring the mip CSR to a known state during hart init and avoid spurious interrupts. Fixes: d9e7368 ("firmware: Not to clear all the MIP") Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-02-08firmware: Not to clear all the MIPNick Hu1-2/+8
In generic behavior of QEMU, if the pending bits of PLIC are still set and we clear the SEIP, the QEMU may not set the SEIP back immediately and the interrupt may not be handled anymore until the new interrupts arrived and QEMU set the SEIP back which is a generic behavior in QEMU. Signed-off-by: Nick Hu <nick.hu@sifive.com> Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-01-27firmware: Fix fw_rw_offset computation in fw_base.SJessica Clarke2-2/+2
It seems BFD just does totally nonsensical things for SHN_ABS symbols when producing position-independent outputs (both -pie and -shared) for various historical reasons, and so SHN_ABS symbols are still subject to relocation as far as BFD is concerned (except AArch64, which fixes it in limited cases that don’t apply here...). The above affects the _fw_rw_offset provided through fw_base.ldS linker script which results in OpenSBI firmware failing to boot when loaded at an address different from FW_TEXT_START. Fixes: c10e3fe5f9a1 ("firmware: Add RW section offset in scratch") Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reported-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Tested-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2023-01-23firmware: Add RW section offset in scratchHimanshu Chauhan1-0/+8
Add the RW section offset, provided by _fw_rw_offset symbol, to the scratch structure. This will be used to program separate pmp entry for RW section. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-01-23firmware: Move dynsym and reladyn sections to RX sectionHimanshu Chauhan1-19/+22
Currently, the dynsym and reladyn sections are under RW data. They are moved to the Read-only/Executable region. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-01-23firmware: Split RO/RX and RW sectionsHimanshu Chauhan1-0/+8
Split the RO/RX and RW sections so that they can have independent pmp entries with required permissions. The split size is ensured to be a power-of-2 as required by pmp. _fw_rw_offset symbol marks the beginning of the data section. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05firmware: Minor optimization for relocateDongdong Zhang1-1/+1
The t3 register stores the address of _load_end. If relocation is not required, it is unnecessary to calculate the address of _load_end. This can reduce the operation time of two instructions. Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-22firmware: payloads: Optimize usage of "ALIGN"Leizheng Zhang2-12/+8
Delete the redundant "ALIGN" and adjust the position of "ALIGN" Signed-off-by: Leizheng Zhang <zhangleizheng@eswincomputing.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-08-08Makefile: Add initial kconfig support for each platformAnup Patel1-0/+1
We extend the top-level makefile to allow kconfig based configuration for each platform where each platform has it's own set of configs with "defconfig" being the default config. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Tested-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Atish Patra <atishp@rivosinc.com> Tested-by: Atish Patra <atishp@rivosinc.com>
2022-03-27firmware: Fix code for accessing hart_count and stack_sizeXiang W1-1/+1
lwu exists under the current rv64 and should also exist under the rv128 in the future, so I modified the conditions of conditional compilation so that it can adapt to the future situation Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2021-12-23firmware: Move memcpy/memset mapping to fw_base.SAnup Patel1-0/+28
Some of the external firmwares using OpenSBI as library are facing issues with the weak memcpy() and memset() aliases in libsbi.a so we move these to fw_base.S. This way mapping of implicit memcpy() or memset() calls to sbi_memcpy() or sbi_memset() will only be done for OpenSBI firmwares. (Refer, https://github.com/riscv-software-src/opensbi/issues/234) In addition, we also add memmove() and memcmp() mappings in fw_base.S because as-per the GCC documentation the freestanding environment must provide memcpy(), memmove(), memset(), and memcmp(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com>
2021-08-20payloads/test: Add support for SBI v0.2 ecallsSamuel Holland1-7/+8
It can be useful to make SBI v0.2 or newer ecalls from this payload for testing purposes. To support this, convert the macros to use the extension/function parameter convention. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-07-27firmware: use _fw_start for load addressXiang W2-4/+4
The previous code uses _start as the load address, this default .entry is the first segment, using _fw_start does not need to make this assumption. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-17firmware: Remove the unhelpful alignment codes before fdt relocationBin Meng1-4/+1
If the device tree is at an address that is not __SIZEOF_POINTER__ aligned, the fdt relocation code tries to align both source and destination address to __SIZEOF_POINTER__ before the memory copy. But such alignment can lead to unexpected results if either source or destination address is not aligned. In fact libfdt requires that the device tree must be at an 8-byte aligned address. Hence remove the unhelpful alignment codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11firmware: Only default FW_PIC to y if supportedJessica Clarke1-1/+1
Bare-metal GNU ld does not support PIE, so if using it this will result in a failure to build. Instead, default to FW_PIC=n if not supported. Note that an explicit FW_PIC=y is not overridden, to ensure the build fails rather than silently producing a position-dependent binary. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11firmware: Explicitly pass -pie to the linker, not just the driverJessica Clarke1-1/+1
When using Clang with a bare-metal triple, -pie does not get passed to the linker as it's not normally a thing that makes sense, unlike GCC which will unconditionally forward it on and potentially result in a linker error. However, LLD does support it, and manually forwarding it on works as desired, so do so to fully support FW_PIC with Clang and LLD. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11fw_base: Put data in .data rather than .textJessica Clarke1-0/+1
The -N linker option is supposed to make .text writable, but GNU ld and LLD differ in interpreting what that means. GNU ld will happily let you have relocations in it, but LLD will see that the input section is read-only (even though the output section is writable) and give an error. It's unclear if either of them intend to have that behaviour in this edge case, but regardless there's no reason not to just put the data in a writable .data section. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11fw_base: Don't mark fw_platform_init as both global and weakJessica Clarke1-1/+0
These are mutually exclusive. GNU as and LLVM both let later binding directives override earlier ones so this works as intended, but LLVM 12 turned this into a warning as there's no good reason to do such a thing and could be a potential bug. Thus, remove the redundant and incorrect .globl directive for fw_platform_init. Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11firmware: Define a macro for version of struct fw_dynamic_infoBin Meng1-2/+2
Avoid using a magic number, instead use a macro for the version of struct fw_dynamic_info. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11firmware: Remove the sanity checks in fw_save_info()Bin Meng1-8/+0
The sanity checks on the magic and version was already done in fw_boot_hart(), which happens before fw_save_info() is called. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11firmware: Minor optimization in _scratch_init()Bin Meng1-4/+9
Before entering _scratch_init(), register t3 already holds a copy of the firmware end address, hence there is no need to calculate it again. This reduces 3 instructions in each _scratch_init() loop. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-04-28firmware: Enable FW_PIC by defaultGuo Ren1-0/+4
Let's have FW_PIC enabled by default so that OpenSBI firmware can by default run from any physical address. Tested with qemu_rv32 & rv64, T-HEAD all hardwares. Suggested-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Tested-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-05firmware: Remove redundant add instruction from trap restore pathAnup Patel1-46/+42
The "add sp, a0, zero" instruction in the trap restore path is redundant and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the base register instead of sp. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-01firware: optimize the exception exit codeXiang W1-22/+2
There are two copies of the same abnormal exit code, this patch deletes one Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-03-19firmware: Support position independent executionVincent Chen3-1/+81
Enable OpenSBI to support position independent execution. Because the position independent code will cause an additional GOT reference when accessing the global variables, it will reduce performance a bit. Therefore, the position independent execution is disabled by default. Users can through specifying "FW_PIC=y" on the make command to enable this feature. In theory, after enabling position-independent execution, the OpenSBI can run at arbitrary address with appropriate alignment. Therefore, the original relocation mechanism will be skipped. In other words, OpenSBI will directly run at the load address without any code movement. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-03-19firmware: Use lla to access all global symbolsVincent Chen5-64/+64
When OpenSBI is compiled as fPIE mode, the assembler will translate "la" to GOT reference pattern. It will cause to cost an additional load instruction when obtaining the symbol address. However, if the symbol locates within the positive or negative 2GB region, we can use "lla" instead of "la" to avoid unneeded GOT references. This patch assumes that the OpenSBI image excluding the payload does not exceed 2GB. Based on this assumption, all "la" instructions are replaced by "lla" to avoid performance degradation when compiling as fPIE mode. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-01-07lib: sbi: Introduce sbi_trap_exit() APIAnup Patel1-0/+43
We introduce sbi_trap_exit() API which can help non-firmware (i.e. generic or platform) code to force exit trap/interrupt handling and resume execution at context pointed by parameter "const struct sbi_trap_regs *regs". This new sbi_trap_exit() API will help Keystone Enclave project to resume execution of enclave from custom SBI call handler. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-12-01firmware: fw_base: Optimize trap handler for RV32 systemsAnup Patel1-19/+68
On RV32 systems, we have two CSRs for M-mode status (MSTATUS and MSTATUSH) when H-extension is implemented. This means we have to save/restore MSTATUSH for RV32 systems only when H-extension is implemented. The current _trap_handler() has extra instructions (roughly 10) for conditional save/restore of MSTATUSH CSR. These extra instructions in RV32 _trap_handler() can be avoided if we create separate low-level trap handler for RV32 systems having H-extension. This patch optimizes low-level trap handler for RV32 systems accordingly. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-10-18firmware: Remove FW_PAYLOAD_FDT_PATH compile-time optionAnup Patel6-64/+0
The FW_PAYLOAD_FDT_PATH compile-time option is replaced by FW_FDT_PATH compile-time option which is more flexible and common across all OpenSBI firmwares. This patch removes FW_PAYLOAD_FDT_PATH and updates related documentation to use FW_FDT_PATH. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Add common FW_FDT_PATH compile-time optionAnup Patel3-0/+27
Currently, only FW_PAYLOAD has mechanism to embed external FDT using FW_PAYLOAD_FDT_PATH compile-time option. This patch adds a common FW_FDT_PATH compile-time option to embed external FDT for all OpenSBI firmwares (i.e FW_JUMP, FW_PAYLOAD, and FW_DYNAMIC). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-08-14firmware: fw_base: Improve exception stack setup in trap handlerAnup Patel1-26/+21
Currently, the low-level trap handler (i.e. _trap_handler()) uses branch instructions to conditionally setup exception stack based on which mode trap occured. This patch implements exception stack setup using xor instructions which is faster with same number of instructions due to lack of branch instructions. The new exception stack setup approach can be best described by the following pseudocode: Came_From_M_Mode = ((MSTATUS.MPP < PRV_M) ? 1 : 0) - 1; Exception_Stack = TP ^ (Came_From_M_Mode & (SP ^ TP)) Came_From_M_Mode = 0 ==> Exception_Stack = TP Came_From_M_Mode = -1 ==> Exception_Stack = SP Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05firmware: Remove FW_PAYLOAD_FDT and related documentationAnup Patel1-5/+0
Now that no platform is using FW_PAYLOAD_FDT mechanism, we remove related code from Makefile and related documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05firmware: Allow fw_platform_init() to return updated FDT locationAnup Patel1-0/+3
Currently, the fw_platform_init() does not return anything but we can further improve by allowing fw_platform_init() to return updated FDT location. It is certainly not mandatory for fw_platform_init() to return a new location of FDT (or modify FDT). In fact, the fw_platform_init() can always return the original FDT location (i.e. 'arg1') unmodified. This new capability of fw_platform_init() will allow platforms to: 1. Have multiple built-in FDTs and select one 2. Modify FDT before using based on platform specific straps or OTP Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05firmware: fw_base: Don't OR forced FW_OPTIONSAnup Patel1-5/+3
Currently, we are ORing FW_OPTIONS with the options passed by previous booting stage to fw_dynamic. This causes confusion because compiling fw_dynamic with FW_OPTIONS=0x2 does not force enable boot prints as the U-Boot SPL passes options=0x1 in fw_dyanmic_info. The best thing to do is always prefer FW_OPTIONS when available. This is intuitive for OpenSBI users and easy in debugging. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-05firmware: fw_base: Make builtin DTB available to fw_platform_init()Anup Patel1-14/+14
Currently, fw_prev_arg1() is called after fw_platform_init() which caused builtin DTB to be not available to fw_platform_init(). To allow builtin DTB available to fw_platform_init(), we should call fw_save_info() and fw_prev_arg1() before fw_platform_init(). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-18firmware: Correct spelling mistakesDaniel Schaefer1-2/+2
Signed-off-by: Daniel Schaefer <git@danielschaefer.me> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-05-01firmware: fw_base: Introduce optional fw_platform_init()Anup Patel1-8/+33
We add optional fw_platform_init() function which will allow platform specific code to update "struct sbi_platform platform" before it is used. The fw_platform_init() can be a regular C function so before callint it we: 1. zero-out BSS section 2. Setup temporary trap handler to catch bugs 3. Setup temporary stack pointer Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-01firmware: fw_base: Remove CSR_MTVEC update checkCharles Papon1-3/+0
Remove unnecessary CSR_MTVEC read to reduce the openSBI CSR requirement. Mux are costly in FPGA. Allowing CSR_MTVEC to be write only is usefull for the FMax/Area of FPGA softcore. https://github.com/SpinalHDL/opensbi.git branch mtvec Signed-off-by: Charles Papon <charles.papon.90@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-28lib: sbi_trap: Simplify sbi_trap_handler() APIAnup Patel1-1/+0
This patch simplify sbi_trap_handler() API as follows: 1. Remove current hartid local variable because sbi_trap_handler() itself does not need it. 2. Remove scratch parameter because none of the functions directly called by sbi_trap_handler() require it. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-19include: sbi_platform: Introduce HART index to HART id tableAnup Patel1-4/+23
A platform can have discontinuous and/or sparse HART ids so we cannot always assume a set of HARTs with continuous HART ids. This patch adds support for discontinuous and sparse HART ids by introducing HART index to HART id table. This table has platform hart_count entries and it maps HART index to HART id. The HART index to HART id table has only two restrictions: 1. HART index < sbi_platform hart_count 2. HART id < SBI_HARTMASK_MAX_BITS Example1: Let's say we have a platform with 2 HART ids 11 and 22, for such a a platform: hart_count = 2 hart_index2id[0] = 11 hart_index2id[1] = 22 Example2: Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4 but out of these HART with id 0 is not usable so for such a platform: hart_count = 5 hart_index2id[0] = -1U hart_index2id[1] = 1 hart_index2id[2] = 2 hart_index2id[3] = 3 hart_index2id[4] = 4 OR hart_count = 4 hart_index2id[0] = 1 hart_index2id[1] = 2 hart_index2id[2] = 3 hart_index2id[3] = 4 With HART index to HART id table in place, the hart_disabled() callback is now redundant so we remove it as well. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-13firmware: fw_base: Optimize _hartid_to_scratch() implementationAnup Patel1-23/+14
This patch optimizes _hartid_to_scratch() in following ways: 1. Use caller saved registers instead of callee saved registers so that we don't need to save/restore registers on stack 2. Remove second redundant mul instruction by re-arranging instructions Overall, we reduce 9 instructions in _hartid_to_scratch() implementation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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