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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-12-13 11:06:07 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-07 20:34:17 +0100 |
| commit | 5e0c126aada959f1474ab633931e22d92869c44f (patch) | |
| tree | 49f055afb40b8d33191bf0649730becb9768acdc /target/mips/cpu.c | |
| parent | c8aeab3a09b51f828eaa50b994434dbfb3f626b8 (diff) | |
| download | qemu-5e0c126aada959f1474ab633931e22d92869c44f.zip qemu-5e0c126aada959f1474ab633931e22d92869c44f.tar.gz qemu-5e0c126aada959f1474ab633931e22d92869c44f.tar.bz2 | |
target/mips: Remove duplicated MIPSCPU::cp0_count_rate
Since the previous commit 9ea89876f9d ("target/mips: Fix cycle
counter timing calculations"), MIPSCPU::cp0_count_rate is not
used anymore. We don't need it since it is already expressed
as mips_def_t::CCRes. Remove the duplicate and clean.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <>20211213102340.1847248-1-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cpu.c')
| -rw-r--r-- | target/mips/cpu.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 0766e25..af28717 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -434,13 +434,11 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) * Since commit 6af0bf9c7c3 this model assumes a CPU clocked at 200MHz. */ #define CPU_FREQ_HZ_DEFAULT 200000000 -#define CP0_COUNT_RATE_DEFAULT 2 static void mips_cp0_period_set(MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env; - /* env->CCRes isn't initialised this early, use env->cpu_model->CCRes. */ env->cp0_count_ns = clock_ticks_to_ns(MIPS_CPU(cpu)->clock, env->cpu_model->CCRes); assert(env->cp0_count_ns); @@ -515,13 +513,6 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) return oc; } -static Property mips_cpu_properties[] = { - /* CP0 timer running at half the clock of the CPU */ - DEFINE_PROP_UINT32("cp0-count-rate", MIPSCPU, cp0_count_rate, - CP0_COUNT_RATE_DEFAULT), - DEFINE_PROP_END_OF_LIST() -}; - #ifndef CONFIG_USER_ONLY #include "hw/core/sysemu-cpu-ops.h" @@ -561,7 +552,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) device_class_set_parent_realize(dc, mips_cpu_realizefn, &mcc->parent_realize); device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); - device_class_set_props(dc, mips_cpu_properties); cc->class_by_name = mips_cpu_class_by_name; cc->has_work = mips_cpu_has_work; |