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author | Frederic Konrad <konrad.frederic@yahoo.fr> | 2025-05-26 10:55:21 +0200 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2025-06-16 11:26:25 +0100 |
commit | 6559e7ad8e535b70e34c79076e6cb6c09d626d0d (patch) | |
tree | 6f3bc1ab02dea1084130fb386fba3c4996933cf2 /hw/intc | |
parent | 5dc8e4e892ba10e040d12afece0d36b8b6a269d6 (diff) | |
download | qemu-6559e7ad8e535b70e34c79076e6cb6c09d626d0d.zip qemu-6559e7ad8e535b70e34c79076e6cb6c09d626d0d.tar.gz qemu-6559e7ad8e535b70e34c79076e6cb6c09d626d0d.tar.bz2 |
hw/intc/arm_gic: introduce a first-cpu-index property
This introduces a first-cpu-index property to the arm-gic, as some SOCs
could have two separate GIC (ie: the zynqmp).
Signed-off-by: Clément Chigot <chigot@adacore.com>
Message-id: 20250526085523.809003-3-chigot@adacore.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: slightly expanded comment documenting GIC property]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r-- | hw/intc/arm_gic.c | 2 | ||||
-rw-r--r-- | hw/intc/arm_gic_common.c | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d18bef4..899f133 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -59,7 +59,7 @@ static const uint8_t gic_id_gicv2[] = { static inline int gic_get_current_cpu(GICState *s) { if (!qtest_enabled() && s->num_cpu > 1) { - return current_cpu->cpu_index; + return current_cpu->cpu_index - s->first_cpu_index; } return 0; } diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 0f0c48d..ed5be05 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -350,6 +350,7 @@ static void arm_gic_common_linux_init(ARMLinuxBootIf *obj, static const Property arm_gic_common_properties[] = { DEFINE_PROP_UINT32("num-cpu", GICState, num_cpu, 1), + DEFINE_PROP_UINT32("first-cpu-index", GICState, first_cpu_index, 0), DEFINE_PROP_UINT32("num-irq", GICState, num_irq, 32), /* Revision can be 1 or 2 for GIC architecture specification * versions 1 or 2, or 0 to indicate the legacy 11MPCore GIC. |