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2024-03-19[X86] Add missing subvector_subreg_lowering for BF16 (#83720)llvmorg-18.1.2Phoebe Wang2-1/+22
2024-03-19[RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indice...Luke Lau1-8/+4
2024-03-19[RISCV] Adjust test case to show wrong stride. NFCLuke Lau1-9/+9
2024-03-19[RISCV] Add test case for miscompile in gather -> strided load combine. NFCLuke Lau1-0/+47
2024-03-19[TSan] Fix atomicrmw xchg with pointer and floats (#85228)Nikita Popov1-0/+20
2024-03-19[AVR] Remove earlyclobber from LDDRdPtrQ (#85277)Patryk Wychowaniec1-0/+163
2024-03-19[PowerPC] Update chain uses when emitting lxsizx (#84892)Qiu Chaofan2-0/+116
2024-03-17[InstCombine] Drop UB-implying attrs/metadata after speculating an instructio...Yingwei Zheng1-0/+40
2024-03-16Remove support for EXPORTAS in def files to maintain ABI compatibility for CO...Daniel Paoliello2-187/+0
2024-03-16[Arm64EC] Copy import descriptors to the EC Map (#84834)Daniel Paoliello1-0/+6
2024-03-16[llvm-lib][Object] Add support for EC importlib symbols. (#81059)Jacek Caban1-1/+140
2024-03-16[llvm-lib][llvm-dlltool][Object] Add support for EXPORTAS name types. (#78772)Jacek Caban1-0/+94
2024-03-16[llvm-readobj][Object][COFF] Print COFF import library symbol export name. (#...Jacek Caban6-0/+16
2024-03-13[X86][Inline] Skip inline asm in inlining target feature check (#83820)Nikita Popov1-11/+6
2024-03-13[Inline] Add test for #67054 (NFC)Nikita Popov1-0/+31
2024-03-13[ValueTracking] Treat phi as underlying obj when not decomposing further (#84...Florian Hahn1-1/+6
2024-03-13[LAA] Add test case for #82665.Florian Hahn1-0/+175
2024-03-13[ArgPromotion] Remove incorrect TranspBlocks set for loads. (#84835)Florian Hahn1-7/+7
2024-03-13[ArgPromotion] Add test case for #84807.Florian Hahn1-0/+100
2024-03-12[X86] combineAndShuffleNot - ensure the type is legal before create X86ISD::A...Simon Pilgrim1-0/+19
2024-03-12[DSE] Remove malloc from EarliestEscapeInfo before removing. (#84157)Florian Hahn1-0/+302
2024-03-12[InstCombine] Fix miscompilation in PR83947 (#83993)Yingwei Zheng2-1/+72
2024-03-12[LoongArch] Make sure that the LoongArchISD::BSTRINS node uses the correct `M...wanglei1-0/+13
2024-03-12[InstCombine] Handle scalable splat in `getFlippedStrictnessPredicateAndConst...Yingwei Zheng3-2/+17
2024-03-12[RISCV] Fix crash when unrolling loop containing vector instructions (#83384)Shih-Po Hung1-0/+53
2024-03-11[AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (#80994)Billy Laws1-1/+1
2024-03-11[AArch64] Fix generated types for ARM64EC variadic entry thunk targets (#80595)Billy Laws1-2/+2
2024-03-11[AArch64] Fix variadic tail-calls on ARM64EC (#79774)Billy Laws2-0/+45
2024-03-11[LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#...Lu Weining3-153/+152
2024-03-11[TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicate (#83990)Wang Pengcheng1-0/+25
2024-03-11[InstCombine] Fix infinite loop in select equivalence fold (#84036)Nikita Popov1-1/+37
2024-03-11 [InstCombine] Fix shift calculation in InstCombineCasts (#84027)Quentin Dian1-0/+15
2024-03-11[DSE] Delay deleting non-memory-defs until end of DSE. (#83411)Florian Hahn1-0/+189
2024-03-11Allow .alt_entry symbols to pass the .cfi nesting check (#82268)Jon Roelofs1-1/+5
2024-03-11MIPS: fix emitDirectiveCpsetup on N32 (#80534)YunQiang Su1-12/+35
2024-02-27MIPS: Fix asm constraints "f" and "r" for softfloat (#79116)llvmorg-18.1.0-rc4llvmorg-18.1.0YunQiang Su1-0/+48
2024-02-27[Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77...yingopq5-26/+115
2024-02-26[AArch64] Initial Ampere1B scheduling model (#81341)Philipp Tomsich5-0/+7415
2024-02-26[AArch64] Add the Ampere1B core (#81297)Philipp Tomsich5-0/+7
2024-02-26[llvm][AArch64] Do not inline a function with different signing scheme. (#806...Dani1-0/+104
2024-02-26[FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point ...Yingwei Zheng1-6/+9
2024-02-26[GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrins...Yingwei Zheng1-0/+21
2024-02-26[SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475)Jonas Paulsson1-0/+18
2024-02-26[SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221)Jonas Paulsson1-0/+23
2024-02-23Backport 0bf4f82 to release/18.x (#82571)Wentao Zhang2-2/+2
2024-02-23[llvm-readobj,ELF] Support --decompress/-z (#82594)Fangrui Song4-0/+167
2024-02-23[Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type ...Luke Lau1-0/+19
2024-02-20Fix llvm-x86_64-debian-dylib buildbotllvmorg-18.1.0-rc3Tom Stellard2-4/+5
2024-02-20[IndVarSimplify] Fix poison-safety when reusing instructions (#80458)Nikita Popov2-4/+6
2024-02-20[SCEVExpander] Do not reuse disjoint or (#80281)Nikita Popov1-2/+3
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