aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/SPIRV
AgeCommit message (Expand)AuthorFilesLines
2024-06-11[SPIR-V] Validate and fix bit width of scalar registers (#95147)Vyacheslav Levytskyy1-5/+20
2024-06-11[SPIR-V] Implement insertion of OpGenericCastToPtr using builtin functions (#...Vyacheslav Levytskyy4-73/+130
2024-06-11[SPIR-V] Ensure that DuplicatesTracker is working with TypedPointers pointee ...Vyacheslav Levytskyy1-6/+13
2024-06-11[SPIR-V] Don't change switch condition type in CodeGen opts (#94959)Michal Paszkowski1-0/+5
2024-06-11[SPIR-V] Fix flakiness during switch generation. (#95001)Nathan Gauër1-11/+14
2024-06-07[SPIR-V] Improve type inference, addrspacecast and dependencies between SPIR-...Vyacheslav Levytskyy9-95/+86
2024-06-07[clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (#89796)Alex Voicu1-0/+4
2024-06-06[SPIRV] Fix -Wunused-but-set-variable. NFCFangrui Song1-1/+1
2024-06-06[SPIR-V] Add validation to the test case with get_image_array_size/get_image_...Vyacheslav Levytskyy5-70/+149
2024-06-05[SPIR-V] Introduce support of '__spirv_' wrapper builtins for the SPV_INTEL_s...Vyacheslav Levytskyy2-1/+24
2024-06-05[SPIR-V] Emit valid SPIR-V code for integer sizes other than 8,16,32,64 (#94219)Vyacheslav Levytskyy2-15/+59
2024-06-03[SPIRV] Fix -Wunused-but-set-variable after #92531Fangrui Song1-5/+2
2024-06-03[SPIR-V] Fix legalize info for G_BITREVERSE (#93699)Vyacheslav Levytskyy2-1/+6
2024-06-03[SPIR-V] Add pass to merge convergence region exit targets (#92531)Nathan Gauër6-1/+311
2024-06-03[SPIR-V] Validate type of the last parameter of OpGroupWaitEvents (#93661)Vyacheslav Levytskyy1-26/+73
2024-05-29[SPIR-V] Implement correct zeroinitializer for extension types in SPIR-V Back...Vyacheslav Levytskyy2-11/+21
2024-05-29[SPIR-V] Introduce support of llvm.ptr.annotation to SPIR-V Backend and imple...Vyacheslav Levytskyy5-0/+168
2024-05-29[SPIR-V] Ensure that internal intrinsic functions are inserted at the correct...Vyacheslav Levytskyy1-11/+32
2024-05-24[SPIR-V] Inline assembly support (#93164)Vyacheslav Levytskyy19-15/+340
2024-05-22[SPIR-V] Add cl_khr_kernel_clock / SPV_KHR_shader_clock extension (#92771)Sven van Haastregt6-0/+60
2024-05-20[SPIR-V] Ensure that internal intrinsic functions "ptrcast" for PHI's operand...Vyacheslav Levytskyy1-4/+13
2024-05-20[SPIR-V] reqd_work_group_size and work_group_size_hint metadata are correctly...Vyacheslav Levytskyy1-6/+14
2024-05-19[MC] Make UseAssemblerInfoForParsing mostly trueFangrui Song1-3/+0
2024-05-19[llvm] Use StringRef::contains (NFC) (#92710)Kazu Hirata1-1/+1
2024-05-19[llvm] Use operator==(StringRef, StringRef) (NFC) (#92705)Kazu Hirata1-3/+3
2024-05-17[SPIR-V] Ensure that we don't have a dangling BlockAddress constants after in...Vyacheslav Levytskyy1-1/+18
2024-05-17[SPIR-V] Fix types of internal intrinsic functions and add a test case for __...Vyacheslav Levytskyy1-36/+43
2024-05-17[SPIR-V] Ensure that internal intrinsic functions for PHI's operand are inser...Vyacheslav Levytskyy1-2/+2
2024-05-16Revert "[MC] Remove UseAssemblerInfoForParsing"Nikita Popov1-0/+3
2024-05-15[MC] Remove UseAssemblerInfoForParsingFangrui Song1-3/+0
2024-05-14[SPIR-V] Introduce support for 'spirv.Decorations' metadata node in SPIR-V Ba...Vyacheslav Levytskyy5-0/+67
2024-05-14[SPIR-V] Support saturation arithmetic intrinsics in SPIR-V Backend (#91722)Vyacheslav Levytskyy2-0/+13
2024-05-14[SPIR-V] Set non-kernel function linkage type via OpDecorate for all linkage ...Vyacheslav Levytskyy1-2/+2
2024-05-08[SPIRV] Add tan intrinsic part 3 (#90278)Farzon Lotfi2-0/+3
2024-05-05[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072...Kazu Hirata1-1/+1
2024-04-26[SPIRV] Improve builtins matching and type inference in SPIR-V Backend, fix...Vyacheslav Levytskyy5-41/+123
2024-04-25[MC] Remove RelaxAll parameters from create*StreamerFangrui Song1-2/+2
2024-04-24[SPIR-V] Fix pre-legalizer pass in SPIR-V Backend to support more gMIR opcode...Vyacheslav Levytskyy3-0/+38
2024-04-24Bit width of input/result types in OpSConvert/OpUConvert must not be the same...Vyacheslav Levytskyy2-9/+26
2024-04-22[SPIR-V] Emit SPIR-V generator magic number and version (#87951)Michal Paszkowski8-75/+90
2024-04-22[SPIRV][HLSL] map lerp to Fmix (#88976)Farzon Lotfi1-0/+26
2024-04-19[SPIR-V] SPIR-V Backend must generate a valid OCL version if working in OpenC...Vyacheslav Levytskyy1-3/+14
2024-04-18[SPIR-V] Fix return type when sampling an image with OpImageSampleExplicitLod...Vyacheslav Levytskyy3-3/+6
2024-04-17[SPIR-V] Account for zext in a llvm intrinsic call (#88903)Vyacheslav Levytskyy1-0/+25
2024-04-17[SPIR-V] Improve Tablegen instruction selection and account for a pointer siz...Vyacheslav Levytskyy9-74/+104
2024-04-16[clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (#88455)Alex Voicu1-2/+2
2024-04-15[HLSL][SPIRV] Add any intrinsic lowering (#88325)Farzon Lotfi1-4/+25
2024-04-15[SPIR-V] Update type inference and instruction selection (#88254)Vyacheslav Levytskyy15-38/+267
2024-04-10[Spirv][HLSL] Add OpAll lowering and float vec support (#87952)Farzon Lotfi3-39/+319
2024-04-10[SPIRV] Tweak parsing of base type name in builtins (#88255)Vyacheslav Levytskyy1-4/+12