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author | Craig Topper <craig.topper@intel.com> | 2018-11-15 19:20:22 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-11-15 19:20:22 +0000 |
commit | b144c7a6fbb86d6790e2ce4e3f0772ea3c15ca45 (patch) | |
tree | 0e10c2beeed731ac67aafdfd09c2d303519de544 /llvm | |
parent | c92aa7618f2c6d24c0baa02ee86d734f8b3ad6db (diff) | |
download | llvm-b144c7a6fbb86d6790e2ce4e3f0772ea3c15ca45.zip llvm-b144c7a6fbb86d6790e2ce4e3f0772ea3c15ca45.tar.gz llvm-b144c7a6fbb86d6790e2ce4e3f0772ea3c15ca45.tar.bz2 |
[X86] Minor cleanup to getExtendInVec. NFCI
Use unsigned to calculate the subvector index to avoid a cast.
Remove an unnecessary condition and replace it with a stronger assert.
Use the InVT variable we updated when we extracted instead of grabbing it from the In SDValue.
llvm-svn: 346983
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ecdabf6..4d1d8ae1 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5492,17 +5492,20 @@ static SDValue getOnesVector(EVT VT, SelectionDAG &DAG, const SDLoc &dl) { static SDValue getExtendInVec(bool Signed, const SDLoc &DL, EVT VT, SDValue In, SelectionDAG &DAG) { EVT InVT = In.getValueType(); + assert(VT.isVector() && InVT.isVector() && "Expected vector VTs."); // For 256-bit vectors, we only need the lower (128-bit) input half. // For 512-bit vectors, we only need the lower input half or quarter. - if (VT.getSizeInBits() > 128 && InVT.getSizeInBits() > 128) { - int Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); + if (InVT.getSizeInBits() > 128) { + assert(VT.getSizeInBits() == InVT.getSizeInBits() && + "Expected VTs to be the same size!"); + unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); In = extractSubVector(In, 0, DAG, DL, - std::max(128, (int)VT.getSizeInBits() / Scale)); + std::max(128U, VT.getSizeInBits() / Scale)); InVT = In.getValueType(); } - if (VT.getVectorNumElements() == In.getValueType().getVectorNumElements()) + if (VT.getVectorNumElements() == InVT.getVectorNumElements()) return DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL, VT, In); |