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authorNikita Popov <npopov@redhat.com>2024-05-27 08:29:24 +0200
committerNikita Popov <npopov@redhat.com>2024-05-27 08:29:24 +0200
commitaf16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9 (patch)
tree77417fc933e8e8c2e9955282227c02e36b474ebb /llvm
parent2be8bea1b7bbd16f745d690940b1244bf9ac4233 (diff)
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Revert "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)"
This reverts commit 558c51968f8f8252128f38a2b860c9ae0a86edba. PR merged without review.
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp16
1 files changed, 6 insertions, 10 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
index 2536727..e15f902 100644
--- a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
@@ -17,7 +17,7 @@
#include "SystemZInstrInfo.h"
#include "SystemZSubtarget.h"
#include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LiveRegUnits.h"
+#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
using namespace llvm;
@@ -161,8 +161,7 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
assert(DestReg == MI.getOperand(1).getReg() &&
"Expected destination and first source operand to be the same.");
- const TargetRegisterInfo &TRI = TII->getRegisterInfo();
- LiveRegUnits LiveRegs(TRI);
+ LivePhysRegs LiveRegs(TII->getRegisterInfo());
LiveRegs.addLiveOuts(MBB);
for (auto I = std::prev(MBB.end()); I != MBBI; --I)
LiveRegs.stepBackward(*I);
@@ -172,18 +171,15 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
MF.insert(std::next(MachineFunction::iterator(MBB)), RestMBB);
RestMBB->splice(RestMBB->begin(), &MBB, MI, MBB.end());
RestMBB->transferSuccessors(&MBB);
- const BitVector &BV = TRI.getAllocatableSet(MF);
- for (Register Reg : BV.set_bits())
- if (!LiveRegs.available(Reg))
- RestMBB->addLiveIn(Reg);
+ for (MCPhysReg R : LiveRegs)
+ RestMBB->addLiveIn(R);
// Create a new block MoveMBB to hold the move instruction.
MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock(BB);
MF.insert(std::next(MachineFunction::iterator(MBB)), MoveMBB);
MoveMBB->addLiveIn(SrcReg);
- for (Register Reg : BV.set_bits())
- if (!LiveRegs.available(Reg))
- MoveMBB->addLiveIn(Reg);
+ for (MCPhysReg R : LiveRegs)
+ MoveMBB->addLiveIn(R);
// At the end of MBB, create a conditional branch to RestMBB if the
// condition is false, otherwise fall through to MoveMBB.