[Mips] Rename MipsExprKind to Specifier

Follow the X86 renaming.

> "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
> "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename MipsMCExpr::getKind, which confusingly shadows the base class getKind.

7 files changed, 46 insertions, 47 deletions

diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 568f020..640ae52 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -6353,7 +6353,7 @@ MCRegister MipsAsmParser::getReg(int RC, int RegNo) {
 // e.g. "%lo foo", "(%lo(foo))", "%lo(foo)+1".
 const MCExpr *MipsAsmParser::parseRelocExpr() {
   auto getOp = [](StringRef Op) {
-    return StringSwitch<MipsMCExpr::MipsExprKind>(Op)
+    return StringSwitch<MipsMCExpr::Specifier>(Op)
         .Case("call16", MipsMCExpr::MEK_GOT_CALL)
         .Case("call_hi", MipsMCExpr::MEK_CALL_HI16)
         .Case("call_lo", MipsMCExpr::MEK_CALL_LO16)
@@ -6384,7 +6384,7 @@ const MCExpr *MipsAsmParser::parseRelocExpr() {
   MCAsmParser &Parser = getParser();
   StringRef Name;
   const MCExpr *Res = nullptr;
-  SmallVector<MipsMCExpr::MipsExprKind, 0> Ops;
+  SmallVector<MipsMCExpr::Specifier, 0> Ops;
   while (parseOptionalToken(AsmToken::Percent)) {
     if (Parser.parseIdentifier(Name) ||
         Parser.parseToken(AsmToken::LParen, "expected '('"))
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
index d53ee15..b49f86b 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -584,7 +584,7 @@ getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
     const MipsMCExpr *MipsExpr = cast<MipsMCExpr>(Expr);
 
     Mips::Fixups FixupKind = Mips::Fixups(0);
-    switch (MipsExpr->getKind()) {
+    switch (MipsExpr->getSpecifier()) {
     case MipsMCExpr::MEK_None:
     case MipsMCExpr::MEK_Special:
       llvm_unreachable("Unhandled fixup kind!");
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
index ebabacf..03c675e 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
@@ -24,20 +24,20 @@ using namespace llvm;
 
 #define DEBUG_TYPE "mipsmcexpr"
 
-const MipsMCExpr *MipsMCExpr::create(MipsMCExpr::MipsExprKind Kind,
+const MipsMCExpr *MipsMCExpr::create(MipsMCExpr::Specifier S,
                                      const MCExpr *Expr, MCContext &Ctx) {
-  return new (Ctx) MipsMCExpr(Kind, Expr);
+  return new (Ctx) MipsMCExpr(S, Expr);
 }
 
-const MipsMCExpr *MipsMCExpr::createGpOff(MipsMCExpr::MipsExprKind Kind,
+const MipsMCExpr *MipsMCExpr::createGpOff(MipsMCExpr::Specifier S,
                                           const MCExpr *Expr, MCContext &Ctx) {
-  return create(Kind, create(MEK_NEG, create(MEK_GPREL, Expr, Ctx), Ctx), Ctx);
+  return create(S, create(MEK_NEG, create(MEK_GPREL, Expr, Ctx), Ctx), Ctx);
 }
 
 void MipsMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
   int64_t AbsVal;
 
-  switch (Kind) {
+  switch (specifier) {
   case MEK_None:
   case MEK_Special:
     llvm_unreachable("MEK_None and MEK_Special are invalid");
@@ -129,8 +129,9 @@ void MipsMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
   OS << ')';
 }
 
-bool MipsMCExpr::evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm)
-    const { // Look for the %hi(%neg(%gp_rel(X))) and %lo(%neg(%gp_rel(X)))
+bool MipsMCExpr::evaluateAsRelocatableImpl(MCValue &Res,
+                                           const MCAssembler *Asm) const {
+  // Look for the %hi(%neg(%gp_rel(X))) and %lo(%neg(%gp_rel(X)))
   // special cases.
   if (isGpOff()) {
     const MCExpr *SubExpr =
@@ -146,8 +147,8 @@ bool MipsMCExpr::evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm)
 
   if (!getSubExpr()->evaluateAsRelocatable(Res, Asm))
     return false;
-  Res =
-      MCValue::get(Res.getSymA(), Res.getSymB(), Res.getConstant(), getKind());
+  Res = MCValue::get(Res.getSymA(), Res.getSymB(), Res.getConstant(),
+                     getSpecifier());
   return !Res.getSymB();
 }
 
@@ -155,12 +156,12 @@ void MipsMCExpr::visitUsedExpr(MCStreamer &Streamer) const {
   Streamer.visitUsedExpr(*getSubExpr());
 }
 
-bool MipsMCExpr::isGpOff(MipsExprKind &Kind) const {
-  if (getKind() == MEK_HI || getKind() == MEK_LO) {
+bool MipsMCExpr::isGpOff(Specifier &S) const {
+  if (getSpecifier() == MEK_HI || getSpecifier() == MEK_LO) {
     if (const MipsMCExpr *S1 = dyn_cast<const MipsMCExpr>(getSubExpr())) {
       if (const MipsMCExpr *S2 = dyn_cast<const MipsMCExpr>(S1->getSubExpr())) {
-        if (S1->getKind() == MEK_NEG && S2->getKind() == MEK_GPREL) {
-          Kind = getKind();
+        if (S1->getSpecifier() == MEK_NEG && S2->getSpecifier() == MEK_GPREL) {
+          S = getSpecifier();
           return true;
         }
       }
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
index 80e2463..13dad8d 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
@@ -16,7 +16,7 @@ namespace llvm {
 
 class MipsMCExpr : public MCTargetExpr {
 public:
-  enum MipsExprKind {
+  enum Specifier {
     MEK_None,
     MEK_CALL_HI16,
     MEK_CALL_LO16,
@@ -47,20 +47,19 @@ public:
   };
 
 private:
-  const MipsExprKind Kind;
+  const Specifier specifier;
   const MCExpr *Expr;
 
-  explicit MipsMCExpr(MipsExprKind Kind, const MCExpr *Expr)
-      : Kind(Kind), Expr(Expr) {}
+  explicit MipsMCExpr(Specifier S, const MCExpr *Expr)
+      : specifier(S), Expr(Expr) {}
 
 public:
-  static const MipsMCExpr *create(MipsExprKind Kind, const MCExpr *Expr,
+  static const MipsMCExpr *create(Specifier S, const MCExpr *Expr,
                                   MCContext &Ctx);
-  static const MipsMCExpr *createGpOff(MipsExprKind Kind, const MCExpr *Expr,
+  static const MipsMCExpr *createGpOff(Specifier S, const MCExpr *Expr,
                                        MCContext &Ctx);
 
-  /// Get the kind of this expression.
-  MipsExprKind getKind() const { return Kind; }
+  Specifier getSpecifier() const { return specifier; }
 
   /// Get the child of this expression.
   const MCExpr *getSubExpr() const { return Expr; }
@@ -78,10 +77,10 @@ public:
     return E->getKind() == MCExpr::Target;
   }
 
-  bool isGpOff(MipsExprKind &Kind) const;
+  bool isGpOff(Specifier &S) const;
   bool isGpOff() const {
-    MipsExprKind Kind;
-    return isGpOff(Kind);
+    Specifier S;
+    return isGpOff(S);
   }
 };
 
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 1819456..b411056 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -1245,7 +1245,7 @@ void MipsAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
 // and value for debug thread local expression.
 void MipsAsmPrinter::emitDebugValue(const MCExpr *Value, unsigned Size) const {
   if (auto *MipsExpr = dyn_cast<MipsMCExpr>(Value)) {
-    if (MipsExpr && MipsExpr->getKind() == MipsMCExpr::MEK_DTPREL) {
+    if (MipsExpr && MipsExpr->getSpecifier() == MipsMCExpr::MEK_DTPREL) {
       switch (Size) {
       case 4:
         getTargetStreamer().emitDTPRel32Value(MipsExpr->getSubExpr());
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.cpp b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
index e01d0d1..d1eef17 100644
--- a/llvm/lib/Target/Mips/MipsMCInstLower.cpp
+++ b/llvm/lib/Target/Mips/MipsMCInstLower.cpp
@@ -35,8 +35,7 @@ void MipsMCInstLower::Initialize(MCContext *C) {
 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
                                               MachineOperandType MOTy,
                                               int64_t Offset) const {
-  MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None;
-  MipsMCExpr::MipsExprKind TargetKind = MipsMCExpr::MEK_None;
+  MipsMCExpr::Specifier TargetKind = MipsMCExpr::MEK_None;
   bool IsGpOff = false;
   const MCSymbol *Symbol;
   SmallString<128> Name;
@@ -167,7 +166,7 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
     llvm_unreachable("<unknown operand type>");
   }
 
-  const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Kind, *Ctx);
+  const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, *Ctx);
 
   if (Offset) {
     // Note: Offset can also be negative
@@ -212,7 +211,7 @@ MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
 
 MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
                                      MachineBasicBlock *BB2,
-                                     MipsMCExpr::MipsExprKind Kind) const {
+                                     MipsMCExpr::Specifier Kind) const {
   const MCSymbolRefExpr *Sym1 = MCSymbolRefExpr::create(BB1->getSymbol(), *Ctx);
   const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::create(BB2->getSymbol(), *Ctx);
   const MCBinaryExpr *Sub = MCBinaryExpr::createSub(Sym1, Sym2, *Ctx);
@@ -227,20 +226,20 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
   // Lower register operand.
   OutMI.addOperand(LowerOperand(MI->getOperand(0)));
 
-  MipsMCExpr::MipsExprKind Kind;
+  MipsMCExpr::Specifier Spec;
   unsigned TargetFlags = MI->getOperand(1).getTargetFlags();
   switch (TargetFlags) {
   case MipsII::MO_HIGHEST:
-    Kind = MipsMCExpr::MEK_HIGHEST;
+    Spec = MipsMCExpr::MEK_HIGHEST;
     break;
   case MipsII::MO_HIGHER:
-    Kind = MipsMCExpr::MEK_HIGHER;
+    Spec = MipsMCExpr::MEK_HIGHER;
     break;
   case MipsII::MO_ABS_HI:
-    Kind = MipsMCExpr::MEK_HI;
+    Spec = MipsMCExpr::MEK_HI;
     break;
   case MipsII::MO_ABS_LO:
-    Kind = MipsMCExpr::MEK_LO;
+    Spec = MipsMCExpr::MEK_LO;
     break;
   default:
     report_fatal_error("Unexpected flags for lowerLongBranchLUi");
@@ -249,12 +248,12 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
   if (MI->getNumOperands() == 2) {
     const MCExpr *Expr =
         MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx);
-    const MipsMCExpr *MipsExpr = MipsMCExpr::create(Kind, Expr, *Ctx);
+    const MipsMCExpr *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
     OutMI.addOperand(MCOperand::createExpr(MipsExpr));
   } else if (MI->getNumOperands() == 3) {
     // Create %hi($tgt-$baltgt).
     OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
-                               MI->getOperand(2).getMBB(), Kind));
+                               MI->getOperand(2).getMBB(), Spec));
   }
 }
 
@@ -262,20 +261,20 @@ void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
                                            MCInst &OutMI, int Opcode) const {
   OutMI.setOpcode(Opcode);
 
-  MipsMCExpr::MipsExprKind Kind;
+  MipsMCExpr::Specifier Spec;
   unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
   switch (TargetFlags) {
   case MipsII::MO_HIGHEST:
-    Kind = MipsMCExpr::MEK_HIGHEST;
+    Spec = MipsMCExpr::MEK_HIGHEST;
     break;
   case MipsII::MO_HIGHER:
-    Kind = MipsMCExpr::MEK_HIGHER;
+    Spec = MipsMCExpr::MEK_HIGHER;
     break;
   case MipsII::MO_ABS_HI:
-    Kind = MipsMCExpr::MEK_HI;
+    Spec = MipsMCExpr::MEK_HI;
     break;
   case MipsII::MO_ABS_LO:
-    Kind = MipsMCExpr::MEK_LO;
+    Spec = MipsMCExpr::MEK_LO;
     break;
   default:
     report_fatal_error("Unexpected flags for lowerLongBranchADDiu");
@@ -291,12 +290,12 @@ void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
     // Lower register operand.
     const MCExpr *Expr =
         MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx);
-    const MipsMCExpr *MipsExpr = MipsMCExpr::create(Kind, Expr, *Ctx);
+    const MipsMCExpr *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
     OutMI.addOperand(MCOperand::createExpr(MipsExpr));
   } else if (MI->getNumOperands() == 4) {
     // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt).
     OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
-                               MI->getOperand(3).getMBB(), Kind));
+                               MI->getOperand(3).getMBB(), Spec));
   }
 }
 
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.h b/llvm/lib/Target/Mips/MipsMCInstLower.h
index 605a124..b6ddbe98 100644
--- a/llvm/lib/Target/Mips/MipsMCInstLower.h
+++ b/llvm/lib/Target/Mips/MipsMCInstLower.h
@@ -41,7 +41,7 @@ private:
   MCOperand LowerSymbolOperand(const MachineOperand &MO,
                                MachineOperandType MOTy, int64_t Offset) const;
   MCOperand createSub(MachineBasicBlock *BB1, MachineBasicBlock *BB2,
-                      MipsMCExpr::MipsExprKind Kind) const;
+                      MipsMCExpr::Specifier Kind) const;
   void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
   void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
                             int Opcode) const;