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authorLuke Lau <luke@igalia.com>2024-07-01 14:04:57 +0800
committerLuke Lau <luke@igalia.com>2024-07-01 14:05:22 +0800
commit651e91658b6b119225f641f60c7750f42f0d1089 (patch)
tree4c3c46faa8ac69a0726cacc8fb099ff05945039b /llvm
parent8f9d156ded93c8e8396ad36b433938bfc7883bc4 (diff)
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[RISCV] Add missing CHECK lines for new vsetvli test. NFC
Diffstat (limited to 'llvm')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
index d984e26..68e8f5d 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
@@ -1042,6 +1042,13 @@ declare <vscale x 4 x i32> @llvm.riscv.vadd.mask.nxv4i32.nxv4i32(
; AVL can be from a predecessor block, so make sure we extend its live range
; across blocks.
define <vscale x 2 x i32> @cross_block_avl_extend(i64 %avl, <vscale x 2 x i32> %a, <vscale x 2 x i32> %b) {
+; CHECK-LABEL: cross_block_avl_extend:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma
+; CHECK-NEXT: vadd.vv v9, v8, v9
+; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
+; CHECK-NEXT: vadd.vv v8, v8, v9
+; CHECK-NEXT: ret
entry:
; Get the output vl from a vsetvli
%vl = call i64 @llvm.riscv.vsetvli.i64(i64 %avl, i64 2, i64 0)