diff options
author | Nikita Popov <npopov@redhat.com> | 2023-07-12 11:45:39 +0200 |
---|---|---|
committer | Nikita Popov <npopov@redhat.com> | 2023-07-12 11:48:44 +0200 |
commit | 4ec3ea8afa3448d5343354e1e34ea0513f7e7d13 (patch) | |
tree | 475f9d0b3b6dd75ec88cee6c457fb4b071007498 /llvm | |
parent | bd0710c221d5a79ef8ff3641564f0b574b616180 (diff) | |
download | llvm-4ec3ea8afa3448d5343354e1e34ea0513f7e7d13.zip llvm-4ec3ea8afa3448d5343354e1e34ea0513f7e7d13.tar.gz llvm-4ec3ea8afa3448d5343354e1e34ea0513f7e7d13.tar.bz2 |
[LSR] Convert some tests to opaque pointers (NFC)
These no longer show codegen regressions.
Diffstat (limited to 'llvm')
3 files changed, 249 insertions, 274 deletions
diff --git a/llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll b/llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll index 70d6cff..07debad 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 -; RUN: llc -opaque-pointers=0 -O3 -mtriple=thumb-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=A9 +; RUN: llc -O3 -mtriple=thumb-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=A9 ; @simple is the most basic chain of address induction variables. Chaining ; saves at least one register and avoids complex addressing and setup @@ -7,7 +7,7 @@ ; ; no expensive address computation in the preheader ; no complex address modes -define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind { +define i32 @simple(ptr %a, ptr %b, i32 %x) nounwind { ; A9-LABEL: simple: ; A9: @ %bb.0: @ %entry ; A9-NEXT: .save {r4, r5, r6, lr} @@ -36,21 +36,21 @@ define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind { entry: br label %loop loop: - %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ] + %iv = phi ptr [ %a, %entry ], [ %iv4, %loop ] %s = phi i32 [ 0, %entry ], [ %s4, %loop ] - %v = load i32, i32* %iv - %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x - %v1 = load i32, i32* %iv1 - %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x - %v2 = load i32, i32* %iv2 - %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x - %v3 = load i32, i32* %iv3 + %v = load i32, ptr %iv + %iv1 = getelementptr inbounds i32, ptr %iv, i32 %x + %v1 = load i32, ptr %iv1 + %iv2 = getelementptr inbounds i32, ptr %iv1, i32 %x + %v2 = load i32, ptr %iv2 + %iv3 = getelementptr inbounds i32, ptr %iv2, i32 %x + %v3 = load i32, ptr %iv3 %s1 = add i32 %s, %v %s2 = add i32 %s1, %v1 %s3 = add i32 %s2, %v2 %s4 = add i32 %s3, %v3 - %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x - %cmp = icmp eq i32* %iv4, %b + %iv4 = getelementptr inbounds i32, ptr %iv3, i32 %x + %cmp = icmp eq ptr %iv4, %b br i1 %cmp, label %exit, label %loop exit: ret i32 %s4 @@ -60,7 +60,7 @@ exit: ; ; stride multiples computed in the preheader ; complex address modes -define i32 @user(i32* %a, i32* %b, i32 %x) nounwind { +define i32 @user(ptr %a, ptr %b, i32 %x) nounwind { ; A9-LABEL: user: ; A9: @ %bb.0: @ %entry ; A9-NEXT: .save {r4, r5, r6, r7, lr} @@ -89,22 +89,22 @@ define i32 @user(i32* %a, i32* %b, i32 %x) nounwind { entry: br label %loop loop: - %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ] + %iv = phi ptr [ %a, %entry ], [ %iv4, %loop ] %s = phi i32 [ 0, %entry ], [ %s4, %loop ] - %v = load i32, i32* %iv - %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x - %v1 = load i32, i32* %iv1 - %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x - %v2 = load i32, i32* %iv2 - %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x - %v3 = load i32, i32* %iv3 + %v = load i32, ptr %iv + %iv1 = getelementptr inbounds i32, ptr %iv, i32 %x + %v1 = load i32, ptr %iv1 + %iv2 = getelementptr inbounds i32, ptr %iv1, i32 %x + %v2 = load i32, ptr %iv2 + %iv3 = getelementptr inbounds i32, ptr %iv2, i32 %x + %v3 = load i32, ptr %iv3 %s1 = add i32 %s, %v %s2 = add i32 %s1, %v1 %s3 = add i32 %s2, %v2 %s4 = add i32 %s3, %v3 - %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x - store i32 %s4, i32* %iv - %cmp = icmp eq i32* %iv4, %b + %iv4 = getelementptr inbounds i32, ptr %iv3, i32 %x + store i32 %s4, ptr %iv + %cmp = icmp eq ptr %iv4, %b br i1 %cmp, label %exit, label %loop exit: ret i32 %s4 @@ -118,7 +118,7 @@ exit: ; no spills ; only one stride multiple in the preheader ; no complex address modes or reloads -define void @extrastride(i8* nocapture %main, i32 %main_stride, i32* nocapture %res, i32 %x, i32 %y, i32 %z) nounwind { +define void @extrastride(ptr nocapture %main, i32 %main_stride, ptr nocapture %res, i32 %x, i32 %y, i32 %z) nounwind { ; A9-LABEL: extrastride: ; A9: @ %bb.0: @ %entry ; A9-NEXT: .save {r4, r5, r6, r7, lr} @@ -165,30 +165,25 @@ for.body.lr.ph: ; preds = %entry br label %for.body for.body: ; preds = %for.body.lr.ph, %for.body - %main.addr.011 = phi i8* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ] + %main.addr.011 = phi ptr [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ] %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] - %res.addr.09 = phi i32* [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ] - %0 = bitcast i8* %main.addr.011 to i32* - %1 = load i32, i32* %0, align 4 - %add.ptr = getelementptr inbounds i8, i8* %main.addr.011, i32 %main_stride - %2 = bitcast i8* %add.ptr to i32* - %3 = load i32, i32* %2, align 4 - %add.ptr1 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr.sum - %4 = bitcast i8* %add.ptr1 to i32* - %5 = load i32, i32* %4, align 4 - %add.ptr2 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr1.sum - %6 = bitcast i8* %add.ptr2 to i32* - %7 = load i32, i32* %6, align 4 - %add.ptr3 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr4.sum - %8 = bitcast i8* %add.ptr3 to i32* - %9 = load i32, i32* %8, align 4 - %add = add i32 %3, %1 - %add4 = add i32 %add, %5 - %add5 = add i32 %add4, %7 - %add6 = add i32 %add5, %9 - store i32 %add6, i32* %res.addr.09, align 4 - %add.ptr6 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr3.sum - %add.ptr7 = getelementptr inbounds i32, i32* %res.addr.09, i32 %y + %res.addr.09 = phi ptr [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ] + %0 = load i32, ptr %main.addr.011, align 4 + %add.ptr = getelementptr inbounds i8, ptr %main.addr.011, i32 %main_stride + %1 = load i32, ptr %add.ptr, align 4 + %add.ptr1 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr.sum + %2 = load i32, ptr %add.ptr1, align 4 + %add.ptr2 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr1.sum + %3 = load i32, ptr %add.ptr2, align 4 + %add.ptr3 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr4.sum + %4 = load i32, ptr %add.ptr3, align 4 + %add = add i32 %1, %0 + %add4 = add i32 %add, %2 + %add5 = add i32 %add4, %3 + %add6 = add i32 %add5, %4 + store i32 %add6, ptr %res.addr.09, align 4 + %add.ptr6 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr3.sum + %add.ptr7 = getelementptr inbounds i32, ptr %res.addr.09, i32 %y %inc = add i32 %i.010, 1 %cmp = icmp eq i32 %inc, %z br i1 %cmp, label %for.end, label %for.body @@ -203,7 +198,7 @@ for.end: ; preds = %for.body, %entry ; } ; where 's' can be folded into the addressing mode. ; Consequently, we should *not* form any chains. -define void @foldedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c) nounwind ssp { +define void @foldedidx(ptr nocapture %a, ptr nocapture %b, ptr nocapture %c) nounwind ssp { ; A9-LABEL: foldedidx: ; A9: @ %bb.0: @ %entry ; A9-NEXT: .save {r4, r5, r6, lr} @@ -240,49 +235,49 @@ entry: for.body: ; preds = %for.body, %entry %i.07 = phi i32 [ 0, %entry ], [ %inc.3, %for.body ] - %arrayidx = getelementptr inbounds i8, i8* %a, i32 %i.07 - %0 = load i8, i8* %arrayidx, align 1 + %arrayidx = getelementptr inbounds i8, ptr %a, i32 %i.07 + %0 = load i8, ptr %arrayidx, align 1 %conv5 = zext i8 %0 to i32 - %arrayidx1 = getelementptr inbounds i8, i8* %b, i32 %i.07 - %1 = load i8, i8* %arrayidx1, align 1 + %arrayidx1 = getelementptr inbounds i8, ptr %b, i32 %i.07 + %1 = load i8, ptr %arrayidx1, align 1 %conv26 = zext i8 %1 to i32 %add = add nsw i32 %conv26, %conv5 %conv3 = trunc i32 %add to i8 - %arrayidx4 = getelementptr inbounds i8, i8* %c, i32 %i.07 - store i8 %conv3, i8* %arrayidx4, align 1 + %arrayidx4 = getelementptr inbounds i8, ptr %c, i32 %i.07 + store i8 %conv3, ptr %arrayidx4, align 1 %inc1 = or i32 %i.07, 1 - %arrayidx.1 = getelementptr inbounds i8, i8* %a, i32 %inc1 - %2 = load i8, i8* %arrayidx.1, align 1 + %arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc1 + %2 = load i8, ptr %arrayidx.1, align 1 %conv5.1 = zext i8 %2 to i32 - %arrayidx1.1 = getelementptr inbounds i8, i8* %b, i32 %inc1 - %3 = load i8, i8* %arrayidx1.1, align 1 + %arrayidx1.1 = getelementptr inbounds i8, ptr %b, i32 %inc1 + %3 = load i8, ptr %arrayidx1.1, align 1 %conv26.1 = zext i8 %3 to i32 %add.1 = add nsw i32 %conv26.1, %conv5.1 %conv3.1 = trunc i32 %add.1 to i8 - %arrayidx4.1 = getelementptr inbounds i8, i8* %c, i32 %inc1 - store i8 %conv3.1, i8* %arrayidx4.1, align 1 + %arrayidx4.1 = getelementptr inbounds i8, ptr %c, i32 %inc1 + store i8 %conv3.1, ptr %arrayidx4.1, align 1 %inc.12 = or i32 %i.07, 2 - %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %inc.12 - %4 = load i8, i8* %arrayidx.2, align 1 + %arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.12 + %4 = load i8, ptr %arrayidx.2, align 1 %conv5.2 = zext i8 %4 to i32 - %arrayidx1.2 = getelementptr inbounds i8, i8* %b, i32 %inc.12 - %5 = load i8, i8* %arrayidx1.2, align 1 + %arrayidx1.2 = getelementptr inbounds i8, ptr %b, i32 %inc.12 + %5 = load i8, ptr %arrayidx1.2, align 1 %conv26.2 = zext i8 %5 to i32 %add.2 = add nsw i32 %conv26.2, %conv5.2 %conv3.2 = trunc i32 %add.2 to i8 - %arrayidx4.2 = getelementptr inbounds i8, i8* %c, i32 %inc.12 - store i8 %conv3.2, i8* %arrayidx4.2, align 1 + %arrayidx4.2 = getelementptr inbounds i8, ptr %c, i32 %inc.12 + store i8 %conv3.2, ptr %arrayidx4.2, align 1 %inc.23 = or i32 %i.07, 3 - %arrayidx.3 = getelementptr inbounds i8, i8* %a, i32 %inc.23 - %6 = load i8, i8* %arrayidx.3, align 1 + %arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.23 + %6 = load i8, ptr %arrayidx.3, align 1 %conv5.3 = zext i8 %6 to i32 - %arrayidx1.3 = getelementptr inbounds i8, i8* %b, i32 %inc.23 - %7 = load i8, i8* %arrayidx1.3, align 1 + %arrayidx1.3 = getelementptr inbounds i8, ptr %b, i32 %inc.23 + %7 = load i8, ptr %arrayidx1.3, align 1 %conv26.3 = zext i8 %7 to i32 %add.3 = add nsw i32 %conv26.3, %conv5.3 %conv3.3 = trunc i32 %add.3 to i8 - %arrayidx4.3 = getelementptr inbounds i8, i8* %c, i32 %inc.23 - store i8 %conv3.3, i8* %arrayidx4.3, align 1 + %arrayidx4.3 = getelementptr inbounds i8, ptr %c, i32 %inc.23 + store i8 %conv3.3, ptr %arrayidx4.3, align 1 %inc.3 = add nsw i32 %i.07, 4 %exitcond.3 = icmp eq i32 %inc.3, 400 br i1 %exitcond.3, label %for.end, label %for.body @@ -295,7 +290,7 @@ for.end: ; preds = %for.body ; ; Loads and stores should use post-increment addressing, no add's or add.w's. ; Most importantly, there should be no spills or reloads! -define hidden void @testNeon(i8* %ref_data, i32 %ref_stride, i32 %limit, <16 x i8>* nocapture %data) nounwind optsize { +define hidden void @testNeon(ptr %ref_data, i32 %ref_stride, i32 %limit, ptr nocapture %data) nounwind optsize { ; A9-LABEL: testNeon: ; A9: @ %bb.0: ; A9-NEXT: .save {r4, r5, r7, lr} @@ -350,67 +345,67 @@ define hidden void @testNeon(i8* %ref_data, i32 %ref_stride, i32 %limit, <16 x i br label %11 ; <label>:11 ; preds = %11, %.lr.ph - %.05 = phi i8* [ %ref_data, %.lr.ph ], [ %42, %11 ] + %.05 = phi ptr [ %ref_data, %.lr.ph ], [ %42, %11 ] %counter.04 = phi i32 [ 0, %.lr.ph ], [ %44, %11 ] %result.03 = phi <16 x i8> [ zeroinitializer, %.lr.ph ], [ %41, %11 ] - %.012 = phi <16 x i8>* [ %data, %.lr.ph ], [ %43, %11 ] - %12 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %.05, i32 1) nounwind - %13 = getelementptr inbounds i8, i8* %.05, i32 %ref_stride - %14 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %13, i32 1) nounwind + %.012 = phi ptr [ %data, %.lr.ph ], [ %43, %11 ] + %12 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %.05, i32 1) nounwind + %13 = getelementptr inbounds i8, ptr %.05, i32 %ref_stride + %14 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %13, i32 1) nounwind %15 = shufflevector <1 x i64> %12, <1 x i64> %14, <2 x i32> <i32 0, i32 1> %16 = bitcast <2 x i64> %15 to <16 x i8> - %17 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 1 - store <16 x i8> %16, <16 x i8>* %.012, align 4 - %18 = getelementptr inbounds i8, i8* %.05, i32 %2 - %19 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %18, i32 1) nounwind - %20 = getelementptr inbounds i8, i8* %.05, i32 %3 - %21 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %20, i32 1) nounwind + %17 = getelementptr inbounds <16 x i8>, ptr %.012, i32 1 + store <16 x i8> %16, ptr %.012, align 4 + %18 = getelementptr inbounds i8, ptr %.05, i32 %2 + %19 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %18, i32 1) nounwind + %20 = getelementptr inbounds i8, ptr %.05, i32 %3 + %21 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %20, i32 1) nounwind %22 = shufflevector <1 x i64> %19, <1 x i64> %21, <2 x i32> <i32 0, i32 1> %23 = bitcast <2 x i64> %22 to <16 x i8> - %24 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 2 - store <16 x i8> %23, <16 x i8>* %17, align 4 - %25 = getelementptr inbounds i8, i8* %.05, i32 %4 - %26 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %25, i32 1) nounwind - %27 = getelementptr inbounds i8, i8* %.05, i32 %5 - %28 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %27, i32 1) nounwind + %24 = getelementptr inbounds <16 x i8>, ptr %.012, i32 2 + store <16 x i8> %23, ptr %17, align 4 + %25 = getelementptr inbounds i8, ptr %.05, i32 %4 + %26 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %25, i32 1) nounwind + %27 = getelementptr inbounds i8, ptr %.05, i32 %5 + %28 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %27, i32 1) nounwind %29 = shufflevector <1 x i64> %26, <1 x i64> %28, <2 x i32> <i32 0, i32 1> %30 = bitcast <2 x i64> %29 to <16 x i8> - %31 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 3 - store <16 x i8> %30, <16 x i8>* %24, align 4 - %32 = getelementptr inbounds i8, i8* %.05, i32 %6 - %33 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %32, i32 1) nounwind - %34 = getelementptr inbounds i8, i8* %.05, i32 %7 - %35 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8* %34, i32 1) nounwind + %31 = getelementptr inbounds <16 x i8>, ptr %.012, i32 3 + store <16 x i8> %30, ptr %24, align 4 + %32 = getelementptr inbounds i8, ptr %.05, i32 %6 + %33 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %32, i32 1) nounwind + %34 = getelementptr inbounds i8, ptr %.05, i32 %7 + %35 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr %34, i32 1) nounwind %36 = shufflevector <1 x i64> %33, <1 x i64> %35, <2 x i32> <i32 0, i32 1> %37 = bitcast <2 x i64> %36 to <16 x i8> - store <16 x i8> %37, <16 x i8>* %31, align 4 + store <16 x i8> %37, ptr %31, align 4 %38 = add <16 x i8> %16, %23 %39 = add <16 x i8> %38, %30 %40 = add <16 x i8> %39, %37 %41 = add <16 x i8> %result.03, %40 - %42 = getelementptr i8, i8* %.05, i32 %9 - %43 = getelementptr inbounds <16 x i8>, <16 x i8>* %.012, i32 -64 + %42 = getelementptr i8, ptr %.05, i32 %9 + %43 = getelementptr inbounds <16 x i8>, ptr %.012, i32 -64 %44 = add nsw i32 %counter.04, 1 %exitcond = icmp eq i32 %44, %limit br i1 %exitcond, label %._crit_edge, label %11 ._crit_edge: ; preds = %11 - %scevgep = getelementptr <16 x i8>, <16 x i8>* %data, i32 %10 + %scevgep = getelementptr <16 x i8>, ptr %data, i32 %10 br label %45 ; <label>:45 ; preds = %._crit_edge, %0 %result.0.lcssa = phi <16 x i8> [ %41, %._crit_edge ], [ zeroinitializer, %0 ] - %.01.lcssa = phi <16 x i8>* [ %scevgep, %._crit_edge ], [ %data, %0 ] - store <16 x i8> %result.0.lcssa, <16 x i8>* %.01.lcssa, align 4 + %.01.lcssa = phi ptr [ %scevgep, %._crit_edge ], [ %data, %0 ] + store <16 x i8> %result.0.lcssa, ptr %.01.lcssa, align 4 ret void } -declare <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8(i8*, i32) nounwind readonly +declare <1 x i64> @llvm.arm.neon.vld1.v1i64.p0(ptr, i32) nounwind readonly ; Handle chains in which the same offset is used for both loads and ; stores to the same array. ; rdar://11410078. -define void @testReuse(i8* %src, i32 %stride) nounwind ssp { +define void @testReuse(ptr %src, i32 %stride) nounwind ssp { ; A9-LABEL: testReuse: ; A9: @ %bb.0: @ %entry ; A9-NEXT: sub.w r12, r0, r1, lsl #2 @@ -457,36 +452,36 @@ entry: for.body: ; preds = %for.body, %entry %i.0110 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %src.addr = phi i8* [ %src, %entry ], [ %add.ptr45, %for.body ] - %add.ptr = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg - %vld1 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr, i32 1) - %add.ptr3 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg2 - %vld2 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr3, i32 1) - %add.ptr7 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg6 - %vld3 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr7, i32 1) - %add.ptr11 = getelementptr inbounds i8, i8* %src.addr, i32 %idx.neg10 - %vld4 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr11, i32 1) - %vld5 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %src.addr, i32 1) - %add.ptr17 = getelementptr inbounds i8, i8* %src.addr, i32 %stride - %vld6 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr17, i32 1) - %add.ptr20 = getelementptr inbounds i8, i8* %src.addr, i32 %mul5 - %vld7 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr20, i32 1) - %add.ptr23 = getelementptr inbounds i8, i8* %src.addr, i32 %mul1 - %vld8 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8* %add.ptr23, i32 1) + %src.addr = phi ptr [ %src, %entry ], [ %add.ptr45, %for.body ] + %add.ptr = getelementptr inbounds i8, ptr %src.addr, i32 %idx.neg + %vld1 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr, i32 1) + %add.ptr3 = getelementptr inbounds i8, ptr %src.addr, i32 %idx.neg2 + %vld2 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr3, i32 1) + %add.ptr7 = getelementptr inbounds i8, ptr %src.addr, i32 %idx.neg6 + %vld3 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr7, i32 1) + %add.ptr11 = getelementptr inbounds i8, ptr %src.addr, i32 %idx.neg10 + %vld4 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr11, i32 1) + %vld5 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %src.addr, i32 1) + %add.ptr17 = getelementptr inbounds i8, ptr %src.addr, i32 %stride + %vld6 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr17, i32 1) + %add.ptr20 = getelementptr inbounds i8, ptr %src.addr, i32 %mul5 + %vld7 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr20, i32 1) + %add.ptr23 = getelementptr inbounds i8, ptr %src.addr, i32 %mul1 + %vld8 = tail call <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr %add.ptr23, i32 1) %vadd1 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld1, <8 x i8> %vld2) nounwind %vadd2 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld2, <8 x i8> %vld3) nounwind %vadd3 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld3, <8 x i8> %vld4) nounwind %vadd4 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld4, <8 x i8> %vld5) nounwind %vadd5 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld5, <8 x i8> %vld6) nounwind %vadd6 = tail call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %vld6, <8 x i8> %vld7) nounwind - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr3, <8 x i8> %vadd1, i32 1) - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr7, <8 x i8> %vadd2, i32 1) - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr11, <8 x i8> %vadd3, i32 1) - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %src.addr, <8 x i8> %vadd4, i32 1) - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr17, <8 x i8> %vadd5, i32 1) - tail call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %add.ptr20, <8 x i8> %vadd6, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %add.ptr3, <8 x i8> %vadd1, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %add.ptr7, <8 x i8> %vadd2, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %add.ptr11, <8 x i8> %vadd3, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %src.addr, <8 x i8> %vadd4, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %add.ptr17, <8 x i8> %vadd5, i32 1) + tail call void @llvm.arm.neon.vst1.p0.v8i8(ptr %add.ptr20, <8 x i8> %vadd6, i32 1) %inc = add nsw i32 %i.0110, 1 - %add.ptr45 = getelementptr inbounds i8, i8* %src.addr, i32 8 + %add.ptr45 = getelementptr inbounds i8, ptr %src.addr, i32 8 %exitcond = icmp eq i32 %inc, 4 br i1 %exitcond, label %for.end, label %for.body @@ -494,8 +489,8 @@ for.end: ; preds = %for.body ret void } -declare <8 x i8> @llvm.arm.neon.vld1.v8i8.p0i8(i8*, i32) nounwind readonly +declare <8 x i8> @llvm.arm.neon.vld1.v8i8.p0(ptr, i32) nounwind readonly -declare void @llvm.arm.neon.vst1.p0i8.v8i8(i8*, <8 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst1.p0.v8i8(ptr, <8 x i8>, i32) nounwind declare <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll index 63a3c72..d618b63 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -opaque-pointers=0 < %s -O3 -mtriple=x86_64-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X64 -; RUN: llc -opaque-pointers=0 < %s -O3 -mtriple=i686-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -O3 -mtriple=x86_64-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -O3 -mtriple=i686-unknown-unknown -mcpu=core2 | FileCheck %s -check-prefix=X32 ; @simple is the most basic chain of address induction variables. Chaining ; saves at least one register and avoids complex addressing and setup @@ -13,7 +13,7 @@ ; no expensive address computation in the preheader ; no complex address modes -define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind { +define i32 @simple(ptr %a, ptr %b, i32 %x) nounwind { ; X64-LABEL: simple: ; X64: # %bb.0: # %entry ; X64-NEXT: movslq %edx, %rcx @@ -68,21 +68,21 @@ define i32 @simple(i32* %a, i32* %b, i32 %x) nounwind { entry: br label %loop loop: - %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ] + %iv = phi ptr [ %a, %entry ], [ %iv4, %loop ] %s = phi i32 [ 0, %entry ], [ %s4, %loop ] - %v = load i32, i32* %iv - %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x - %v1 = load i32, i32* %iv1 - %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x - %v2 = load i32, i32* %iv2 - %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x - %v3 = load i32, i32* %iv3 + %v = load i32, ptr %iv + %iv1 = getelementptr inbounds i32, ptr %iv, i32 %x + %v1 = load i32, ptr %iv1 + %iv2 = getelementptr inbounds i32, ptr %iv1, i32 %x + %v2 = load i32, ptr %iv2 + %iv3 = getelementptr inbounds i32, ptr %iv2, i32 %x + %v3 = load i32, ptr %iv3 %s1 = add i32 %s, %v %s2 = add i32 %s1, %v1 %s3 = add i32 %s2, %v2 %s4 = add i32 %s3, %v3 - %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x - %cmp = icmp eq i32* %iv4, %b + %iv4 = getelementptr inbounds i32, ptr %iv3, i32 %x + %cmp = icmp eq ptr %iv4, %b br i1 %cmp, label %exit, label %loop exit: ret i32 %s4 @@ -92,7 +92,7 @@ exit: ; ; expensive address computation in the preheader ; complex address modes -define i32 @user(i32* %a, i32* %b, i32 %x) nounwind { +define i32 @user(ptr %a, ptr %b, i32 %x) nounwind { ; X64-LABEL: user: ; X64: # %bb.0: # %entry ; X64-NEXT: movslq %edx, %rcx @@ -147,22 +147,22 @@ define i32 @user(i32* %a, i32* %b, i32 %x) nounwind { entry: br label %loop loop: - %iv = phi i32* [ %a, %entry ], [ %iv4, %loop ] + %iv = phi ptr [ %a, %entry ], [ %iv4, %loop ] %s = phi i32 [ 0, %entry ], [ %s4, %loop ] - %v = load i32, i32* %iv - %iv1 = getelementptr inbounds i32, i32* %iv, i32 %x - %v1 = load i32, i32* %iv1 - %iv2 = getelementptr inbounds i32, i32* %iv1, i32 %x - %v2 = load i32, i32* %iv2 - %iv3 = getelementptr inbounds i32, i32* %iv2, i32 %x - %v3 = load i32, i32* %iv3 + %v = load i32, ptr %iv + %iv1 = getelementptr inbounds i32, ptr %iv, i32 %x + %v1 = load i32, ptr %iv1 + %iv2 = getelementptr inbounds i32, ptr %iv1, i32 %x + %v2 = load i32, ptr %iv2 + %iv3 = getelementptr inbounds i32, ptr %iv2, i32 %x + %v3 = load i32, ptr %iv3 %s1 = add i32 %s, %v %s2 = add i32 %s1, %v1 %s3 = add i32 %s2, %v2 %s4 = add i32 %s3, %v3 - %iv4 = getelementptr inbounds i32, i32* %iv3, i32 %x - store i32 %s4, i32* %iv - %cmp = icmp eq i32* %iv4, %b + %iv4 = getelementptr inbounds i32, ptr %iv3, i32 %x + store i32 %s4, ptr %iv + %cmp = icmp eq ptr %iv4, %b br i1 %cmp, label %exit, label %loop exit: ret i32 %s4 @@ -179,7 +179,7 @@ exit: ; ; For x32, no spills in the preheader, no complex address modes, no reloads. -define void @extrastride(i8* nocapture %main, i32 %main_stride, i32* nocapture %res, i32 %x, i32 %y, i32 %z) nounwind { +define void @extrastride(ptr nocapture %main, i32 %main_stride, ptr nocapture %res, i32 %x, i32 %y, i32 %z) nounwind { ; X64-LABEL: extrastride: ; X64: # %bb.0: # %entry ; X64-NEXT: # kill: def $ecx killed $ecx def $rcx @@ -271,30 +271,25 @@ for.body.lr.ph: ; preds = %entry br label %for.body for.body: ; preds = %for.body.lr.ph, %for.body - %main.addr.011 = phi i8* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ] + %main.addr.011 = phi ptr [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ] %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] - %res.addr.09 = phi i32* [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ] - %0 = bitcast i8* %main.addr.011 to i32* - %1 = load i32, i32* %0, align 4 - %add.ptr = getelementptr inbounds i8, i8* %main.addr.011, i32 %main_stride - %2 = bitcast i8* %add.ptr to i32* - %3 = load i32, i32* %2, align 4 - %add.ptr1 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr.sum - %4 = bitcast i8* %add.ptr1 to i32* - %5 = load i32, i32* %4, align 4 - %add.ptr2 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr1.sum - %6 = bitcast i8* %add.ptr2 to i32* - %7 = load i32, i32* %6, align 4 - %add.ptr3 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr4.sum - %8 = bitcast i8* %add.ptr3 to i32* - %9 = load i32, i32* %8, align 4 - %add = add i32 %3, %1 - %add4 = add i32 %add, %5 - %add5 = add i32 %add4, %7 - %add6 = add i32 %add5, %9 - store i32 %add6, i32* %res.addr.09, align 4 - %add.ptr6 = getelementptr inbounds i8, i8* %main.addr.011, i32 %add.ptr3.sum - %add.ptr7 = getelementptr inbounds i32, i32* %res.addr.09, i32 %y + %res.addr.09 = phi ptr [ %res, %for.body.lr.ph ], [ %add.ptr7, %for.body ] + %0 = load i32, ptr %main.addr.011, align 4 + %add.ptr = getelementptr inbounds i8, ptr %main.addr.011, i32 %main_stride + %1 = load i32, ptr %add.ptr, align 4 + %add.ptr1 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr.sum + %2 = load i32, ptr %add.ptr1, align 4 + %add.ptr2 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr1.sum + %3 = load i32, ptr %add.ptr2, align 4 + %add.ptr3 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr4.sum + %4 = load i32, ptr %add.ptr3, align 4 + %add = add i32 %1, %0 + %add4 = add i32 %add, %2 + %add5 = add i32 %add4, %3 + %add6 = add i32 %add5, %4 + store i32 %add6, ptr %res.addr.09, align 4 + %add.ptr6 = getelementptr inbounds i8, ptr %main.addr.011, i32 %add.ptr3.sum + %add.ptr7 = getelementptr inbounds i32, ptr %res.addr.09, i32 %y %inc = add i32 %i.010, 1 %cmp = icmp eq i32 %inc, %z br i1 %cmp, label %for.end, label %for.body @@ -310,7 +305,7 @@ for.end: ; preds = %for.body, %entry ; where 's' can be folded into the addressing mode. ; Consequently, we should *not* form any chains. -define void @foldedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c) nounwind ssp { +define void @foldedidx(ptr nocapture %a, ptr nocapture %b, ptr nocapture %c) nounwind ssp { ; X64-LABEL: foldedidx: ; X64: # %bb.0: # %entry ; X64-NEXT: movl $3, %eax @@ -380,49 +375,49 @@ entry: for.body: ; preds = %for.body, %entry %i.07 = phi i32 [ 0, %entry ], [ %inc.3, %for.body ] - %arrayidx = getelementptr inbounds i8, i8* %a, i32 %i.07 - %0 = load i8, i8* %arrayidx, align 1 + %arrayidx = getelementptr inbounds i8, ptr %a, i32 %i.07 + %0 = load i8, ptr %arrayidx, align 1 %conv5 = zext i8 %0 to i32 - %arrayidx1 = getelementptr inbounds i8, i8* %b, i32 %i.07 - %1 = load i8, i8* %arrayidx1, align 1 + %arrayidx1 = getelementptr inbounds i8, ptr %b, i32 %i.07 + %1 = load i8, ptr %arrayidx1, align 1 %conv26 = zext i8 %1 to i32 %add = add nsw i32 %conv26, %conv5 %conv3 = trunc i32 %add to i8 - %arrayidx4 = getelementptr inbounds i8, i8* %c, i32 %i.07 - store i8 %conv3, i8* %arrayidx4, align 1 + %arrayidx4 = getelementptr inbounds i8, ptr %c, i32 %i.07 + store i8 %conv3, ptr %arrayidx4, align 1 %inc1 = or i32 %i.07, 1 - %arrayidx.1 = getelementptr inbounds i8, i8* %a, i32 %inc1 - %2 = load i8, i8* %arrayidx.1, align 1 + %arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc1 + %2 = load i8, ptr %arrayidx.1, align 1 %conv5.1 = zext i8 %2 to i32 - %arrayidx1.1 = getelementptr inbounds i8, i8* %b, i32 %inc1 - %3 = load i8, i8* %arrayidx1.1, align 1 + %arrayidx1.1 = getelementptr inbounds i8, ptr %b, i32 %inc1 + %3 = load i8, ptr %arrayidx1.1, align 1 %conv26.1 = zext i8 %3 to i32 %add.1 = add nsw i32 %conv26.1, %conv5.1 %conv3.1 = trunc i32 %add.1 to i8 - %arrayidx4.1 = getelementptr inbounds i8, i8* %c, i32 %inc1 - store i8 %conv3.1, i8* %arrayidx4.1, align 1 + %arrayidx4.1 = getelementptr inbounds i8, ptr %c, i32 %inc1 + store i8 %conv3.1, ptr %arrayidx4.1, align 1 %inc.12 = or i32 %i.07, 2 - %arrayidx.2 = getelementptr inbounds i8, i8* %a, i32 %inc.12 - %4 = load i8, i8* %arrayidx.2, align 1 + %arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.12 + %4 = load i8, ptr %arrayidx.2, align 1 %conv5.2 = zext i8 %4 to i32 - %arrayidx1.2 = getelementptr inbounds i8, i8* %b, i32 %inc.12 - %5 = load i8, i8* %arrayidx1.2, align 1 + %arrayidx1.2 = getelementptr inbounds i8, ptr %b, i32 %inc.12 + %5 = load i8, ptr %arrayidx1.2, align 1 %conv26.2 = zext i8 %5 to i32 %add.2 = add nsw i32 %conv26.2, %conv5.2 %conv3.2 = trunc i32 %add.2 to i8 - %arrayidx4.2 = getelementptr inbounds i8, i8* %c, i32 %inc.12 - store i8 %conv3.2, i8* %arrayidx4.2, align 1 + %arrayidx4.2 = getelementptr inbounds i8, ptr %c, i32 %inc.12 + store i8 %conv3.2, ptr %arrayidx4.2, align 1 %inc.23 = or i32 %i.07, 3 - %arrayidx.3 = getelementptr inbounds i8, i8* %a, i32 %inc.23 - %6 = load i8, i8* %arrayidx.3, align 1 + %arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.23 + %6 = load i8, ptr %arrayidx.3, align 1 %conv5.3 = zext i8 %6 to i32 - %arrayidx1.3 = getelementptr inbounds i8, i8* %b, i32 %inc.23 - %7 = load i8, i8* %arrayidx1.3, align 1 + %arrayidx1.3 = getelementptr inbounds i8, ptr %b, i32 %inc.23 + %7 = load i8, ptr %arrayidx1.3, align 1 %conv26.3 = zext i8 %7 to i32 %add.3 = add nsw i32 %conv26.3, %conv5.3 %conv3.3 = trunc i32 %add.3 to i8 - %arrayidx4.3 = getelementptr inbounds i8, i8* %c, i32 %inc.23 - store i8 %conv3.3, i8* %arrayidx4.3, align 1 + %arrayidx4.3 = getelementptr inbounds i8, ptr %c, i32 %inc.23 + store i8 %conv3.3, ptr %arrayidx4.3, align 1 %inc.3 = add nsw i32 %i.07, 4 %exitcond.3 = icmp eq i32 %inc.3, 400 br i1 %exitcond.3, label %for.end, label %for.body @@ -434,7 +429,7 @@ for.end: ; preds = %for.body ; @multioper tests instructions with multiple IV user operands. We ; should be able to chain them independent of each other. -define void @multioper(i32* %a, i32 %n) nounwind { +define void @multioper(ptr %a, i32 %n) nounwind { ; X64-LABEL: multioper: ; X64: # %bb.0: # %entry ; X64-NEXT: xorl %eax, %eax @@ -480,19 +475,19 @@ entry: br label %for.body for.body: - %p = phi i32* [ %p.next, %for.body ], [ %a, %entry ] + %p = phi ptr [ %p.next, %for.body ], [ %a, %entry ] %i = phi i32 [ %inc4, %for.body ], [ 0, %entry ] - store i32 %i, i32* %p, align 4 + store i32 %i, ptr %p, align 4 %inc1 = or i32 %i, 1 - %add.ptr.i1 = getelementptr inbounds i32, i32* %p, i32 1 - store i32 %inc1, i32* %add.ptr.i1, align 4 + %add.ptr.i1 = getelementptr inbounds i32, ptr %p, i32 1 + store i32 %inc1, ptr %add.ptr.i1, align 4 %inc2 = add nsw i32 %i, 2 - %add.ptr.i2 = getelementptr inbounds i32, i32* %p, i32 2 - store i32 %inc2, i32* %add.ptr.i2, align 4 + %add.ptr.i2 = getelementptr inbounds i32, ptr %p, i32 2 + store i32 %inc2, ptr %add.ptr.i2, align 4 %inc3 = add nsw i32 %i, 3 - %add.ptr.i3 = getelementptr inbounds i32, i32* %p, i32 3 - store i32 %inc3, i32* %add.ptr.i3, align 4 - %p.next = getelementptr inbounds i32, i32* %p, i32 4 + %add.ptr.i3 = getelementptr inbounds i32, ptr %p, i32 3 + store i32 %inc3, ptr %add.ptr.i3, align 4 + %p.next = getelementptr inbounds i32, ptr %p, i32 4 %inc4 = add nsw i32 %i, 4 %cmp = icmp slt i32 %inc4, %n br i1 %cmp, label %for.body, label %exit @@ -505,7 +500,7 @@ exit: ; LSR. Profitable chains should have more than one nonzero increment ; anyway. -define void @testCmpZero(i8* %src, i8* %dst, i32 %srcidx, i32 %dstidx, i32 %len) nounwind ssp { +define void @testCmpZero(ptr %src, ptr %dst, i32 %srcidx, i32 %dstidx, i32 %len) nounwind ssp { ; X64-LABEL: testCmpZero: ; X64: # %bb.0: # %entry ; X64-NEXT: movslq %edx, %rdx @@ -550,22 +545,21 @@ define void @testCmpZero(i8* %src, i8* %dst, i32 %srcidx, i32 %dstidx, i32 %len) ; X32-NEXT: popl %ebx ; X32-NEXT: retl entry: - %dest0 = getelementptr inbounds i8, i8* %src, i32 %srcidx - %source0 = getelementptr inbounds i8, i8* %dst, i32 %dstidx + %dest0 = getelementptr inbounds i8, ptr %src, i32 %srcidx + %source0 = getelementptr inbounds i8, ptr %dst, i32 %dstidx %add.ptr79.us.sum = add i32 %srcidx, %len - %lftr.limit = getelementptr i8, i8* %src, i32 %add.ptr79.us.sum + %lftr.limit = getelementptr i8, ptr %src, i32 %add.ptr79.us.sum br label %for.body82.us for.body82.us: - %dest = phi i8* [ %dest0, %entry ], [ %incdec.ptr91.us, %for.body82.us ] - %source = phi i8* [ %source0, %entry ], [ %add.ptr83.us, %for.body82.us ] - %0 = bitcast i8* %source to i32* - %1 = load i32, i32* %0, align 4 - %trunc = trunc i32 %1 to i8 - %add.ptr83.us = getelementptr inbounds i8, i8* %source, i32 4 - %incdec.ptr91.us = getelementptr inbounds i8, i8* %dest, i32 1 - store i8 %trunc, i8* %dest, align 1 - %exitcond = icmp eq i8* %incdec.ptr91.us, %lftr.limit + %dest = phi ptr [ %dest0, %entry ], [ %incdec.ptr91.us, %for.body82.us ] + %source = phi ptr [ %source0, %entry ], [ %add.ptr83.us, %for.body82.us ] + %0 = load i32, ptr %source, align 4 + %trunc = trunc i32 %0 to i8 + %add.ptr83.us = getelementptr inbounds i8, ptr %source, i32 4 + %incdec.ptr91.us = getelementptr inbounds i8, ptr %dest, i32 1 + store i8 %trunc, ptr %dest, align 1 + %exitcond = icmp eq ptr %incdec.ptr91.us, %lftr.limit br i1 %exitcond, label %return, label %for.body82.us return: diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/macro-fuse-cmp.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/macro-fuse-cmp.ll index e466cdc..feff010 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/macro-fuse-cmp.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/macro-fuse-cmp.ll @@ -1,11 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: opt -opaque-pointers=0 < %s -loop-reduce -mcpu=btver2 -S | FileCheck %s --check-prefix=JAG -; RUN: opt -opaque-pointers=0 < %s -loop-reduce -mcpu=bdver2 -S | FileCheck %s --check-prefix=BUL -; RUN: opt -opaque-pointers=0 < %s -loop-reduce -mcpu=haswell -S | FileCheck %s --check-prefix=HSW +; RUN: opt < %s -loop-reduce -mcpu=btver2 -S | FileCheck %s --check-prefix=JAG +; RUN: opt < %s -loop-reduce -mcpu=bdver2 -S | FileCheck %s --check-prefix=BUL +; RUN: opt < %s -loop-reduce -mcpu=haswell -S | FileCheck %s --check-prefix=HSW -; RUN: llc -opaque-pointers=0 < %s | FileCheck %s --check-prefix=BASE -; RUN: llc -opaque-pointers=0 < %s -mattr=macrofusion | FileCheck %s --check-prefix=FUSE -; RUN: llc -opaque-pointers=0 < %s -mattr=branchfusion | FileCheck %s --check-prefix=FUSE +; RUN: llc < %s | FileCheck %s --check-prefix=BASE +; RUN: llc < %s -mattr=macrofusion | FileCheck %s --check-prefix=FUSE +; RUN: llc < %s -mattr=branchfusion | FileCheck %s --check-prefix=FUSE target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-unknown" @@ -15,28 +15,21 @@ target triple = "x86_64-unknown-unknown" ; cost in LSR and avoid generating large offsets in each memory access. ; This reduces code size and may improve decode throughput. -define void @maxArray(double* noalias nocapture %x, double* noalias nocapture readonly %y) { +define void @maxArray(ptr noalias nocapture %x, ptr noalias nocapture readonly %y) { ; JAG-LABEL: @maxArray( ; JAG-NEXT: entry: -; JAG-NEXT: [[Y1:%.*]] = bitcast double* [[Y:%.*]] to i8* -; JAG-NEXT: [[X3:%.*]] = bitcast double* [[X:%.*]] to i8* ; JAG-NEXT: br label [[VECTOR_BODY:%.*]] ; JAG: vector.body: ; JAG-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[VECTOR_BODY]] ], [ -524288, [[ENTRY:%.*]] ] -; JAG-NEXT: [[UGLYGEP7:%.*]] = getelementptr i8, i8* [[X3]], i64 [[LSR_IV]] -; JAG-NEXT: [[UGLYGEP78:%.*]] = bitcast i8* [[UGLYGEP7]] to <2 x double>* -; JAG-NEXT: [[SCEVGEP9:%.*]] = getelementptr <2 x double>, <2 x double>* [[UGLYGEP78]], i64 32768 -; JAG-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[Y1]], i64 [[LSR_IV]] -; JAG-NEXT: [[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to <2 x double>* -; JAG-NEXT: [[SCEVGEP:%.*]] = getelementptr <2 x double>, <2 x double>* [[UGLYGEP2]], i64 32768 -; JAG-NEXT: [[XVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP9]], align 8 -; JAG-NEXT: [[YVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP]], align 8 +; JAG-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[X:%.*]], i64 [[LSR_IV]] +; JAG-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SCEVGEP2]], i64 524288 +; JAG-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[LSR_IV]] +; JAG-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 524288 +; JAG-NEXT: [[XVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP3]], align 8 +; JAG-NEXT: [[YVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP1]], align 8 ; JAG-NEXT: [[CMP:%.*]] = fcmp ogt <2 x double> [[YVAL]], [[XVAL]] ; JAG-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[YVAL]], <2 x double> [[XVAL]] -; JAG-NEXT: [[UGLYGEP4:%.*]] = getelementptr i8, i8* [[X3]], i64 [[LSR_IV]] -; JAG-NEXT: [[UGLYGEP45:%.*]] = bitcast i8* [[UGLYGEP4]] to <2 x double>* -; JAG-NEXT: [[SCEVGEP6:%.*]] = getelementptr <2 x double>, <2 x double>* [[UGLYGEP45]], i64 32768 -; JAG-NEXT: store <2 x double> [[MAX]], <2 x double>* [[SCEVGEP6]], align 8 +; JAG-NEXT: store <2 x double> [[MAX]], ptr [[SCEVGEP3]], align 8 ; JAG-NEXT: [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], 16 ; JAG-NEXT: [[DONE:%.*]] = icmp eq i64 [[LSR_IV_NEXT]], 0 ; JAG-NEXT: br i1 [[DONE]], label [[EXIT:%.*]], label [[VECTOR_BODY]] @@ -48,17 +41,15 @@ define void @maxArray(double* noalias nocapture %x, double* noalias nocapture re ; BUL-NEXT: br label [[VECTOR_BODY:%.*]] ; BUL: vector.body: ; BUL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; BUL-NEXT: [[SCEVGEP4:%.*]] = getelementptr double, double* [[X:%.*]], i64 [[INDEX]] -; BUL-NEXT: [[SCEVGEP45:%.*]] = bitcast double* [[SCEVGEP4]] to <2 x double>* -; BUL-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[Y:%.*]], i64 [[INDEX]] -; BUL-NEXT: [[SCEVGEP1:%.*]] = bitcast double* [[SCEVGEP]] to <2 x double>* -; BUL-NEXT: [[XVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP45]], align 8 -; BUL-NEXT: [[YVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP1]], align 8 +; BUL-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDEX]], 3 +; BUL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[X:%.*]], i64 [[TMP0]] +; BUL-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[INDEX]], 3 +; BUL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[TMP1]] +; BUL-NEXT: [[XVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP1]], align 8 +; BUL-NEXT: [[YVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP]], align 8 ; BUL-NEXT: [[CMP:%.*]] = fcmp ogt <2 x double> [[YVAL]], [[XVAL]] ; BUL-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[YVAL]], <2 x double> [[XVAL]] -; BUL-NEXT: [[SCEVGEP2:%.*]] = getelementptr double, double* [[X]], i64 [[INDEX]] -; BUL-NEXT: [[SCEVGEP23:%.*]] = bitcast double* [[SCEVGEP2]] to <2 x double>* -; BUL-NEXT: store <2 x double> [[MAX]], <2 x double>* [[SCEVGEP23]], align 8 +; BUL-NEXT: store <2 x double> [[MAX]], ptr [[SCEVGEP1]], align 8 ; BUL-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2 ; BUL-NEXT: [[DONE:%.*]] = icmp eq i64 [[INDEX_NEXT]], 65536 ; BUL-NEXT: br i1 [[DONE]], label [[EXIT:%.*]], label [[VECTOR_BODY]] @@ -70,17 +61,15 @@ define void @maxArray(double* noalias nocapture %x, double* noalias nocapture re ; HSW-NEXT: br label [[VECTOR_BODY:%.*]] ; HSW: vector.body: ; HSW-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; HSW-NEXT: [[SCEVGEP4:%.*]] = getelementptr double, double* [[X:%.*]], i64 [[INDEX]] -; HSW-NEXT: [[SCEVGEP45:%.*]] = bitcast double* [[SCEVGEP4]] to <2 x double>* -; HSW-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[Y:%.*]], i64 [[INDEX]] -; HSW-NEXT: [[SCEVGEP1:%.*]] = bitcast double* [[SCEVGEP]] to <2 x double>* -; HSW-NEXT: [[XVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP45]], align 8 -; HSW-NEXT: [[YVAL:%.*]] = load <2 x double>, <2 x double>* [[SCEVGEP1]], align 8 +; HSW-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDEX]], 3 +; HSW-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[X:%.*]], i64 [[TMP0]] +; HSW-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[INDEX]], 3 +; HSW-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[TMP1]] +; HSW-NEXT: [[XVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP1]], align 8 +; HSW-NEXT: [[YVAL:%.*]] = load <2 x double>, ptr [[SCEVGEP]], align 8 ; HSW-NEXT: [[CMP:%.*]] = fcmp ogt <2 x double> [[YVAL]], [[XVAL]] ; HSW-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x double> [[YVAL]], <2 x double> [[XVAL]] -; HSW-NEXT: [[SCEVGEP2:%.*]] = getelementptr double, double* [[X]], i64 [[INDEX]] -; HSW-NEXT: [[SCEVGEP23:%.*]] = bitcast double* [[SCEVGEP2]] to <2 x double>* -; HSW-NEXT: store <2 x double> [[MAX]], <2 x double>* [[SCEVGEP23]], align 8 +; HSW-NEXT: store <2 x double> [[MAX]], ptr [[SCEVGEP1]], align 8 ; HSW-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2 ; HSW-NEXT: [[DONE:%.*]] = icmp eq i64 [[INDEX_NEXT]], 65536 ; HSW-NEXT: br i1 [[DONE]], label [[EXIT:%.*]], label [[VECTOR_BODY]] @@ -121,16 +110,13 @@ entry: vector.body: %index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ] - %gepx = getelementptr inbounds double, double* %x, i64 %index - %gepy = getelementptr inbounds double, double* %y, i64 %index - %xptr = bitcast double* %gepx to <2 x double>* - %yptr = bitcast double* %gepy to <2 x double>* - %xval = load <2 x double>, <2 x double>* %xptr, align 8 - %yval = load <2 x double>, <2 x double>* %yptr, align 8 + %gepx = getelementptr inbounds double, ptr %x, i64 %index + %gepy = getelementptr inbounds double, ptr %y, i64 %index + %xval = load <2 x double>, ptr %gepx, align 8 + %yval = load <2 x double>, ptr %gepy, align 8 %cmp = fcmp ogt <2 x double> %yval, %xval %max = select <2 x i1> %cmp, <2 x double> %yval, <2 x double> %xval - %xptr_again = bitcast double* %gepx to <2 x double>* - store <2 x double> %max, <2 x double>* %xptr_again, align 8 + store <2 x double> %max, ptr %gepx, align 8 %index.next = add i64 %index, 2 %done = icmp eq i64 %index.next, 65536 br i1 %done, label %exit, label %vector.body |