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authorPhoebe Wang <phoebe.wang@intel.com>2024-08-02 13:04:10 +0800
committerGitHub <noreply@github.com>2024-08-02 13:04:10 +0800
commit2e0588d5e1c9e9a0936846173dbc488f462a6c2d (patch)
tree151b1b4c4bb7833ccf30656744496d4dfc94bedd /llvm/utils/TableGen/X86DisassemblerTables.cpp
parent8abdf7cc71a72a67ae7b3e60002943e84c8ab218 (diff)
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Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (#101612)
Reverts llvm/llvm-project#101452 There are several buildbot failed. Revert first.
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
-rw-r--r--llvm/utils/TableGen/X86DisassemblerTables.cpp32
1 files changed, 1 insertions, 31 deletions
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp
index b0acd4ea..7d28c48 100644
--- a/llvm/utils/TableGen/X86DisassemblerTables.cpp
+++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp
@@ -575,31 +575,6 @@ static inline bool inheritsFrom(InstructionContext child,
case IC_EVEX_W_NF:
case IC_EVEX_W_B_NF:
return false;
- case IC_EVEX_B_U:
- case IC_EVEX_XS_B_U:
- case IC_EVEX_XD_B_U:
- case IC_EVEX_OPSIZE_B_U:
- case IC_EVEX_W_B_U:
- case IC_EVEX_W_XS_B_U:
- case IC_EVEX_W_XD_B_U:
- case IC_EVEX_W_OPSIZE_B_U:
- case IC_EVEX_K_B_U:
- case IC_EVEX_XS_K_B_U:
- case IC_EVEX_XD_K_B_U:
- case IC_EVEX_OPSIZE_K_B_U:
- case IC_EVEX_W_K_B_U:
- case IC_EVEX_W_XS_K_B_U:
- case IC_EVEX_W_XD_K_B_U:
- case IC_EVEX_W_OPSIZE_K_B_U:
- case IC_EVEX_KZ_B_U:
- case IC_EVEX_XS_KZ_B_U:
- case IC_EVEX_XD_KZ_B_U:
- case IC_EVEX_OPSIZE_KZ_B_U:
- case IC_EVEX_W_KZ_B_U:
- case IC_EVEX_W_XS_KZ_B_U:
- case IC_EVEX_W_XD_KZ_B_U:
- case IC_EVEX_W_OPSIZE_KZ_B_U:
- return false;
default:
errs() << "Unknown instruction class: "
<< stringForContext((InstructionContext)parent) << "\n";
@@ -951,9 +926,7 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
else
o << "IC_VEX";
- if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU))
- ; // Ignore ATTR_VEXL and ATTR_EVEXL2 under YMM rounding.
- else if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
+ if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
o << "_L2";
else if (index & ATTR_VEXL)
o << "_L";
@@ -976,9 +949,6 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
if (index & ATTR_EVEXB)
o << "_B";
-
- if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU))
- o << "_U";
}
} else if ((index & ATTR_64BIT) && (index & ATTR_REX2))
o << "IC_64BIT_REX2";