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| author | Dmitry Preobrazhensky <d-pre@mail.ru> | 2022-07-26 17:48:25 +0300 |
|---|---|---|
| committer | Dmitry Preobrazhensky <d-pre@mail.ru> | 2022-07-26 17:52:34 +0300 |
| commit | e43621b09c9741d2e3a8a3d8ed216699af5ff8ba (patch) | |
| tree | c47b169f1a81d9312f8bf0371a795b5cf16bb4bf /llvm/lib | |
| parent | a5640968f2f7485b2aa4919f5fa68fd8f23e2d1f (diff) | |
| download | llvm-e43621b09c9741d2e3a8a3d8ed216699af5ff8ba.zip llvm-e43621b09c9741d2e3a8a3d8ed216699af5ff8ba.tar.gz llvm-e43621b09c9741d2e3a8a3d8ed216699af5ff8ba.tar.bz2 | |
[AMDGPU][MC][GFX11] Correct src0 for VOP3_DPP variants of v_cmp*class* opcodes
Disable SGPRs for src0 of these opcodes.
Differential Revision: https://reviews.llvm.org/D130486
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOPCInstructions.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOPCInstructions.td b/llvm/lib/Target/AMDGPU/VOPCInstructions.td index d489a08..5973d32 100644 --- a/llvm/lib/Target/AMDGPU/VOPCInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPCInstructions.td @@ -718,7 +718,7 @@ class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : // DPP8 forbids modifiers and can inherit from VOPC_Profile let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); - dag InsPartVOP3DPP = (ins Src0Mod:$src0_modifiers, VGPRSrc_32:$src0, VGPRSrc_32:$src1); + dag InsPartVOP3DPP = (ins FPVRegInputMods:$src0_modifiers, VGPRSrc_32:$src0, VGPRSrc_32:$src1); let InsVOP3Base = !con(InsPartVOP3DPP, !if(HasOpSel, (ins op_sel0:$op_sel), (ins))); let Asm64 = "$sdst, $src0_modifiers, $src1"; |