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| author | Xiaodong Liu <liuxiaodong@loongson.cn> | 2022-12-03 11:00:18 +0800 |
|---|---|---|
| committer | Xiaodong Liu <liuxiaodong@loongson.cn> | 2022-12-03 11:01:12 +0800 |
| commit | d62480c1995b32eea8b9ed5a92829ee5615c4750 (patch) | |
| tree | 07a145d7c60658350168ce854ed6120bef9ed4da /llvm/lib | |
| parent | f64d4a26cee0030e4dd70ef74683254ec23fca4c (diff) | |
| download | llvm-d62480c1995b32eea8b9ed5a92829ee5615c4750.zip llvm-d62480c1995b32eea8b9ed5a92829ee5615c4750.tar.gz llvm-d62480c1995b32eea8b9ed5a92829ee5615c4750.tar.bz2 | |
[LoongArch] Use tablegen size for getInstSizeInBytes
Correct the pseudo atomic instruction size for branch
relaxation and branch folding passes.
Inspired by D118175, D118009 and D117970.
Depends on D138481
Reviewed By: SixWeining, gonglingqin, xen0n
Differential Revision: https://reviews.llvm.org/D138469
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 6 |
2 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp index 58669f1..6b017c8 100644 --- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp @@ -176,7 +176,10 @@ void LoongArchInstrInfo::movImm(MachineBasicBlock &MBB, } unsigned LoongArchInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { - if (MI.getOpcode() == TargetOpcode::INLINEASM) { + unsigned Opcode = MI.getOpcode(); + + if (Opcode == TargetOpcode::INLINEASM || + Opcode == TargetOpcode::INLINEASM_BR) { const MachineFunction *MF = MI.getParent()->getParent(); const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo(); return getInlineAsmLength(MI.getOperand(0).getSymbolName(), *MAI); diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td index 1a2fd2e..dea15f7 100644 --- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td +++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td @@ -1302,6 +1302,7 @@ class PseudoMaskedAM let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 36; } def PseudoMaskedAtomicSwap32 : PseudoMaskedAM; @@ -1315,6 +1316,7 @@ class PseudoAM : Pseudo<(outs GPR:$res, GPR:$scratch), let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 24; } def PseudoAtomicSwap32 : PseudoAM; @@ -1347,6 +1349,7 @@ class PseudoMaskedAMUMinUMax let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 48; } def PseudoMaskedAtomicLoadUMax32 : PseudoMaskedAMUMinUMax; @@ -1361,6 +1364,7 @@ class PseudoMaskedAMMinMax let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 56; } def PseudoMaskedAtomicLoadMax32 : PseudoMaskedAMMinMax; @@ -1375,6 +1379,7 @@ class PseudoCmpXchg let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 36; } def PseudoCmpXchg32 : PseudoCmpXchg; @@ -1388,6 +1393,7 @@ def PseudoMaskedCmpXchg32 let mayLoad = 1; let mayStore = 1; let hasSideEffects = 0; + let Size = 44; } class PseudoMaskedAMMinMaxPat<Intrinsic intrin, Pseudo AMInst> |