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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-11-06 12:39:38 -0800 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-11-06 15:47:32 -0800 |
| commit | d17bcf2bb9195c7d6ac8d8cf9faaa103bfd40ef2 (patch) | |
| tree | d04986a2ceb56839c1f1be2a2c14c4e320dd1542 /llvm/lib | |
| parent | e74e61ff297e81c0a9bda54037033fc40fc76e1d (diff) | |
| download | llvm-d17bcf2bb9195c7d6ac8d8cf9faaa103bfd40ef2.zip llvm-d17bcf2bb9195c7d6ac8d8cf9faaa103bfd40ef2.tar.gz llvm-d17bcf2bb9195c7d6ac8d8cf9faaa103bfd40ef2.tar.bz2 | |
[AMDGPU] Add handling of 160 bit registers in analyzeResourceUsage
This was omitted. Also SReg_96Reg missed IsSGPR assignment.
Differential Revision: https://reviews.llvm.org/D69919
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index f2d903c..c4fac3e 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -793,6 +793,7 @@ AMDGPUAsmPrinter::SIFunctionResourceInfo AMDGPUAsmPrinter::analyzeResourceUsage( IsSGPR = false; Width = 3; } else if (AMDGPU::SReg_96RegClass.contains(Reg)) { + IsSGPR = true; Width = 3; } else if (AMDGPU::SReg_128RegClass.contains(Reg)) { assert(!AMDGPU::TTMP_128RegClass.contains(Reg) && @@ -806,6 +807,12 @@ AMDGPUAsmPrinter::SIFunctionResourceInfo AMDGPUAsmPrinter::analyzeResourceUsage( IsSGPR = false; IsAGPR = true; Width = 4; + } else if (AMDGPU::VReg_160RegClass.contains(Reg)) { + IsSGPR = false; + Width = 5; + } else if (AMDGPU::SReg_160RegClass.contains(Reg)) { + IsSGPR = true; + Width = 5; } else if (AMDGPU::SReg_256RegClass.contains(Reg)) { assert(!AMDGPU::TTMP_256RegClass.contains(Reg) && "trap handler registers should not be used"); |