diff options
author | Freddy Ye <freddy.ye@intel.com> | 2023-07-28 10:13:03 +0800 |
---|---|---|
committer | Freddy Ye <freddy.ye@intel.com> | 2023-07-28 15:05:54 +0800 |
commit | c9d92e66387baab18ceec1533503cc5f19048d91 (patch) | |
tree | 21eaddb774bc15add264145c3078af51e7d0d3b2 /llvm/lib | |
parent | 31747668aaaa325227013e4cdd2c7aa185110485 (diff) | |
download | llvm-c9d92e66387baab18ceec1533503cc5f19048d91.zip llvm-c9d92e66387baab18ceec1533503cc5f19048d91.tar.gz llvm-c9d92e66387baab18ceec1533503cc5f19048d91.tar.bz2 |
[X86] Support -march=arrowlake,arrowlake-s,lunarlake
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D156239
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86.td | 14 | ||||
-rw-r--r-- | llvm/lib/TargetParser/Host.cpp | 16 | ||||
-rw-r--r-- | llvm/lib/TargetParser/X86TargetParser.cpp | 8 |
3 files changed, 38 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 0f677b8..a4e08b1 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -1215,6 +1215,14 @@ def ProcessorFeatures { list<SubtargetFeature> GRRFeatures = !listconcat(SRFFeatures, GRRAdditionalFeatures); + // Arrowlake S + list<SubtargetFeature> ARLSAdditionalFeatures = [FeatureAVXVNNIINT16, + FeatureSHA512, + FeatureSM3, + FeatureSM4]; + list<SubtargetFeature> ARLSFeatures = + !listconcat(SRFFeatures, ARLSAdditionalFeatures); + // Knights Landing list<SubtargetFeature> KNLFeatures = [FeatureX87, FeatureCX8, @@ -1717,6 +1725,12 @@ def : ProcModel<"raptorlake", AlderlakePModel, ProcessorFeatures.ADLFeatures, ProcessorFeatures.ADLTuning>; def : ProcModel<"meteorlake", AlderlakePModel, ProcessorFeatures.ADLFeatures, ProcessorFeatures.ADLTuning>; +def : ProcModel<"arrowlake", AlderlakePModel, + ProcessorFeatures.SRFFeatures, ProcessorFeatures.ADLTuning>; +foreach P = ["arrowlake-s", "arrowlake_s", "lunarlake"] in { +def : ProcModel<P, AlderlakePModel, + ProcessorFeatures.ARLSFeatures, ProcessorFeatures.ADLTuning>; +} def : ProcModel<"graniterapids", SapphireRapidsModel, ProcessorFeatures.GNRFeatures, ProcessorFeatures.SPRTuning>; def : ProcModel<"emeraldrapids", SapphireRapidsModel, diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp index ffb7436..1141df0 100644 --- a/llvm/lib/TargetParser/Host.cpp +++ b/llvm/lib/TargetParser/Host.cpp @@ -834,6 +834,22 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, *Subtype = X86::INTEL_COREI7_ALDERLAKE; break; + // Arrowlake: + case 0xc5: + CPU = "arrowlake"; + *Type = X86::INTEL_COREI7; + *Subtype = X86::INTEL_COREI7_ARROWLAKE; + break; + + // Arrowlake S: + case 0xc6: + // Lunarlake: + case 0xbd: + CPU = "arrowlake-s"; + *Type = X86::INTEL_COREI7; + *Subtype = X86::INTEL_COREI7_ARROWLAKE_S; + break; + // Graniterapids: case 0xad: CPU = "graniterapids"; diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp index 8bd0631..b450a3a 100644 --- a/llvm/lib/TargetParser/X86TargetParser.cpp +++ b/llvm/lib/TargetParser/X86TargetParser.cpp @@ -237,6 +237,8 @@ constexpr FeatureBitset FeaturesSierraforest = FeatureENQCMD | FeatureAVXNECONVERT | FeatureAVXVNNIINT8; constexpr FeatureBitset FeaturesGrandridge = FeaturesSierraforest | FeatureRAOINT; +constexpr FeatureBitset FeaturesArrowlakeS = FeaturesSierraforest | + FeatureAVXVNNIINT16 | FeatureSHA512 | FeatureSM3 | FeatureSM4; // Geode Processor. constexpr FeatureBitset FeaturesGeode = @@ -422,6 +424,12 @@ constexpr ProcInfo Processors[] = { { {"raptorlake"}, CK_Raptorlake, FEATURE_AVX2, FeaturesAlderlake, 'p', false }, // Meteorlake microarchitecture based processors. { {"meteorlake"}, CK_Meteorlake, FEATURE_AVX2, FeaturesAlderlake, 'p', false }, + // Arrowlake microarchitecture based processors. + { {"arrowlake"}, CK_Arrowlake, FEATURE_AVX2, FeaturesSierraforest, 'p', false }, + { {"arrowlake-s"}, CK_ArrowlakeS, FEATURE_AVX2, FeaturesArrowlakeS, '\0', false }, + { {"arrowlake_s"}, CK_ArrowlakeS, FEATURE_AVX2, FeaturesArrowlakeS, 'p', true }, + // Lunarlake microarchitecture based processors. + { {"lunarlake"}, CK_Lunarlake, FEATURE_AVX2, FeaturesArrowlakeS, 'p', false }, // Sierraforest microarchitecture based processors. { {"sierraforest"}, CK_Sierraforest, FEATURE_AVX2, FeaturesSierraforest, 'p', false }, // Grandridge microarchitecture based processors. |