diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-01-28 14:42:18 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-01-28 14:42:53 +0000 |
| commit | c7bb3665a1c4a06754e486d8567182821fa32b55 (patch) | |
| tree | ea8d4783bb22d380b104b3fb7695bc7b3b0f26af /llvm/lib | |
| parent | 9d75ee1cd597a762c75e6b680e5af8039850a522 (diff) | |
| download | llvm-c7bb3665a1c4a06754e486d8567182821fa32b55.zip llvm-c7bb3665a1c4a06754e486d8567182821fa32b55.tar.gz llvm-c7bb3665a1c4a06754e486d8567182821fa32b55.tar.bz2 | |
[X86] SimplifyDemandedBitsForTargetNode - fold MOVMSK(YMM) -> MOVMSK(XMM)
If we don't demand the upper elements of the 256-bit vector, then just perform as a 128-bit vector
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 99ef69d..450e594 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -41043,6 +41043,13 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode( if (OriginalDemandedBits.countTrailingZeros() >= NumElts) return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT)); + // See if we only demand bits from the lower 128-bit vector. + if (SrcVT.is256BitVector() && + OriginalDemandedBits.getActiveBits() <= (NumElts / 2)) { + SDValue NewSrc = extract128BitVector(Src, 0, TLO.DAG, SDLoc(Src)); + return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc)); + } + // Only demand the vector elements of the sign bits we need. APInt KnownUndef, KnownZero; APInt DemandedElts = OriginalDemandedBits.zextOrTrunc(NumElts); |