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| author | Craig Topper <craig.topper@sifive.com> | 2024-10-29 19:42:35 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-29 19:42:35 -0700 |
| commit | c62130f7b35412e7caadf5fd9547f21a736c4543 (patch) | |
| tree | aa13c6ae6fe52de23a04ccfd55323913a7d45b8b /llvm/lib | |
| parent | 9e8219a78c80442fb0f795f17926595a94a8e7d7 (diff) | |
| download | llvm-c62130f7b35412e7caadf5fd9547f21a736c4543.zip llvm-c62130f7b35412e7caadf5fd9547f21a736c4543.tar.gz llvm-c62130f7b35412e7caadf5fd9547f21a736c4543.tar.bz2 | |
[RISCV] Add OperandType to loadfpimm. (#114150)
This is represented in the MachineInstr and MCInst as a 5-bit unsigned
immediate so we use OPERAND_UIMM5. If someone needs to know for sure its
an FLI constant in the future we can break it out to a new type.
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td index 2bdcfd2..f13b3e6 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td @@ -35,6 +35,8 @@ def LoadFPImmOperand : AsmOperandClass { def loadfpimm : Operand<XLenVT> { let ParserMatchClass = LoadFPImmOperand; let PrintMethod = "printFPImmOperand"; + let OperandType = "OPERAND_UIMM5"; + let OperandNamespace = "RISCVOp"; } def RTZArg : AsmOperandClass { |