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authorShilei Tian <i@tianshilei.me>2025-03-08 06:28:20 -0800
committerGitHub <noreply@github.com>2025-03-08 09:28:20 -0500
commita779af3f882e1500ee6b9cb973e60c10ea0819b4 (patch)
treec3f4b7cfd0378a308a1591a7ba235d27902be831 /llvm/lib
parente86c5a7b9dbff5383cf9c81aa9eff38a92ce73aa (diff)
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[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)
This PR updates the SGPR layout to a striped caller/callee-saved design, similar to the VGPR layout. To ensure that s30-s31 (return address), s32 (stack pointer), s33 (frame pointer), and s34 (base pointer) remain callee-saved, the striped layout starts from s40, with a stripe width of 8. The last stripe is 10 wide instead of 8 to avoid ending with a 2-wide stripe. Fixes #113782.
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td10
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td b/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
index 80969fc..e891fdb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
@@ -91,7 +91,15 @@ def CSR_AMDGPU_AGPRs : CalleeSavedRegs<
>;
def CSR_AMDGPU_SGPRs : CalleeSavedRegs<
- (sequence "SGPR%u", 30, 105)
+ // Ensure that s30-s31 (return address), s32 (stack pointer), s33 (frame pointer),
+ // and s34 (base pointer) are callee-saved. The striped layout starts from s40,
+ // with a stripe width of 8. The last stripe is 10 wide instead of 8, to avoid
+ // ending with a 2-wide stripe.
+ (add (sequence "SGPR%u", 30, 39),
+ (sequence "SGPR%u", 48, 55),
+ (sequence "SGPR%u", 64, 71),
+ (sequence "SGPR%u", 80, 87),
+ (sequence "SGPR%u", 96, 105))
>;
def CSR_AMDGPU_SI_Gfx_SGPRs : CalleeSavedRegs<