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| author | Konstantina Mitropoulou <44334539+kmitropoulou@users.noreply.github.com> | 2025-01-29 09:00:40 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-29 09:00:40 -0800 |
| commit | 9adc99bcc5645b7446262e89f59c9ff797c8d09b (patch) | |
| tree | 5bad6d9f7e653e2d44949c478de87b4e6eafea19 /llvm/lib | |
| parent | e0054e984cac39322afa32a6e68fc794f0081f49 (diff) | |
| download | llvm-9adc99bcc5645b7446262e89f59c9ff797c8d09b.zip llvm-9adc99bcc5645b7446262e89f59c9ff797c8d09b.tar.gz llvm-9adc99bcc5645b7446262e89f59c9ff797c8d09b.tar.bz2 | |
[AMDGPU] Always emit SI_KILL_I1_PSEUDO for uniform floating point branches. (#124028)
- **[NFC] Use GCNPat instead of Pat.**
- **[AMDGPU] Always emit SI_KILL_I1_PSEUDO for uniform floating point
branches.**
---------
Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou@amd.com>
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPU.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 15 |
2 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td index 7ad6720..6439149 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -2498,6 +2498,9 @@ def HasNotMADIntraFwdBug : Predicate<"!Subtarget->hasMADIntraFwdBug()">; def HasSALUFloatInsts : Predicate<"Subtarget->hasSALUFloatInsts()">, AssemblerPredicate<(all_of FeatureSALUFloatInsts)>; +def NotHasSALUFloatInsts : Predicate<"!Subtarget->hasSALUFloatInsts()">, + AssemblerPredicate<(all_of (not FeatureSALUFloatInsts))>; + def HasPseudoScalarTrans : Predicate<"Subtarget->hasPseudoScalarTrans()">, AssemblerPredicate<(all_of FeaturePseudoScalarTrans)>; diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index aa81d9b..5af4698 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -1053,39 +1053,40 @@ def : GCNPat< (SI_ELSE $src, $target) >; -def : Pat < +def : GCNPat < (int_amdgcn_kill i1:$src), (SI_KILL_I1_PSEUDO SCSrc_i1:$src, 0) >; -def : Pat < +def : GCNPat < (int_amdgcn_kill (i1 (not i1:$src))), (SI_KILL_I1_PSEUDO SCSrc_i1:$src, -1) >; -def : Pat < +let SubtargetPredicate = NotHasSALUFloatInsts in +def : GCNPat < (int_amdgcn_kill (i1 (setcc f32:$src, InlineImmFP32:$imm, cond:$cond))), (SI_KILL_F32_COND_IMM_PSEUDO VSrc_b32:$src, (bitcast_fpimm_to_i32 $imm), (cond_as_i32imm $cond)) >; -def : Pat < +def : GCNPat < (int_amdgcn_wqm_demote i1:$src), (SI_DEMOTE_I1 SCSrc_i1:$src, 0) >; -def : Pat < +def : GCNPat < (int_amdgcn_wqm_demote (i1 (not i1:$src))), (SI_DEMOTE_I1 SCSrc_i1:$src, -1) >; // TODO: we could add more variants for other types of conditionals -def : Pat < +def : GCNPat < (i64 (int_amdgcn_icmp i1:$src, (i1 0), (i32 33))), (COPY $src) // Return the SGPRs representing i1 src >; -def : Pat < +def : GCNPat < (i32 (int_amdgcn_icmp i1:$src, (i1 0), (i32 33))), (COPY $src) // Return the SGPRs representing i1 src >; |