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author | Djordje Todorovic <djordje.todorovic@rt-rk.com> | 2020-02-12 11:54:29 +0100 |
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committer | Djordje Todorovic <djordje.todorovic@rt-rk.com> | 2020-02-12 11:59:04 +0100 |
commit | 97ed706a962af7c6835c7b6716207c4072011ac1 (patch) | |
tree | 8117097319d7db31d77b6443ffad8fe70bc47a1d /llvm/lib | |
parent | 740bc366d44ccd41161739bc1d4b447cd49aba65 (diff) | |
download | llvm-97ed706a962af7c6835c7b6716207c4072011ac1.zip llvm-97ed706a962af7c6835c7b6716207c4072011ac1.tar.gz llvm-97ed706a962af7c6835c7b6716207c4072011ac1.tar.bz2 |
Revert "[DebugInfo] Enable the debug entry values feature by default"
This reverts commit rG9f6ff07f8a39.
Found a test failure on clang-with-thin-lto-ubuntu buildbot.
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 15 | ||||
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 9 | ||||
-rw-r--r-- | llvm/lib/CodeGen/LiveDebugValues.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 3 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/TargetOptionsImpl.cpp | 8 | ||||
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 3 |
13 files changed, 13 insertions, 47 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index cbfbf62..c1e7d9f 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -95,10 +95,6 @@ static cl::opt<bool> UseDwarfRangesBaseAddressSpecifier( "use-dwarf-ranges-base-address-specifier", cl::Hidden, cl::desc("Use base address specifiers in debug_ranges"), cl::init(false)); -static cl::opt<bool> EmitDwarfDebugEntryValues( - "emit-debug-entry-values", cl::Hidden, - cl::desc("Emit the debug entry values"), cl::init(false)); - static cl::opt<bool> GenerateARangeSection("generate-arange-section", cl::Hidden, cl::desc("Generate dwarf aranges"), @@ -423,12 +419,6 @@ DwarfDebug::DwarfDebug(AsmPrinter *A, Module *M) // a monolithic string offsets table without any header. UseSegmentedStringOffsetsTable = DwarfVersion >= 5; - // Emit call-site-param debug info for GDB and LLDB, if the target supports - // the debug entry values feature. It can also be enabled explicitly. - EmitDebugEntryValues = (Asm->TM.Options.ShouldEmitDebugEntryValues() && - (tuneForGDB() || tuneForLLDB())) || - EmitDwarfDebugEntryValues; - Asm->OutStreamer->getContext().setDwarfVersion(DwarfVersion); } @@ -850,8 +840,9 @@ void DwarfDebug::constructCallSiteEntryDIEs(const DISubprogram &SP, DIE &CallSiteDIE = CU.constructCallSiteEntryDIE(ScopeDIE, CalleeDIE, IsTail, PCAddr, CallReg); - // Optionally emit call-site-param debug info. - if (emitDebugEntryValues()) { + // GDB and LLDB support call site parameter debug info. + if (Asm->TM.Options.EnableDebugEntryValues && + (tuneForGDB() || tuneForLLDB())) { ParamSet Params; // Try to interpret values of call site parameters. collectCallSiteParameters(&MI, Params); diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h index 882fc73..a449605 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -386,11 +386,6 @@ class DwarfDebug : public DebugHandlerBase { /// a monolithic sequence of string offsets. bool UseSegmentedStringOffsetsTable; - /// Enable production of call site parameters needed to print the debug entry - /// values. Useful for testing purposes when a debugger does not support the - /// feature yet. - bool EmitDebugEntryValues; - /// Separated Dwarf Variables /// In general these will all be for bits that are left in the /// original object file, rather than things that are meant @@ -713,10 +708,6 @@ public: return UseSegmentedStringOffsetsTable; } - bool emitDebugEntryValues() const { - return EmitDebugEntryValues; - } - bool shareAcrossDWOCUs() const; /// Returns the Dwarf Version. diff --git a/llvm/lib/CodeGen/LiveDebugValues.cpp b/llvm/lib/CodeGen/LiveDebugValues.cpp index a07fd40..6acaf409 100644 --- a/llvm/lib/CodeGen/LiveDebugValues.cpp +++ b/llvm/lib/CodeGen/LiveDebugValues.cpp @@ -960,7 +960,7 @@ void LiveDebugValues::transferRegisterDef( if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) { auto &TM = TPC->getTM<TargetMachine>(); - if (TM.Options.ShouldEmitDebugEntryValues()) + if (TM.Options.EnableDebugEntryValues) emitEntryValues(MI, OpenRanges, VarLocIDs, Transfers, KillSet); } } @@ -1460,7 +1460,7 @@ void LiveDebugValues::recordEntryValue(const MachineInstr &MI, VarLocMap &VarLocIDs) { if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) { auto &TM = TPC->getTM<TargetMachine>(); - if (!TM.Options.ShouldEmitDebugEntryValues()) + if (!TM.Options.EnableDebugEntryValues) return; } diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp index 69d14cf..10157c7 100644 --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -381,11 +381,11 @@ bool MIRParserImpl::initializeCallSiteInfo( CSInfo.emplace_back(Reg, ArgRegPair.ArgNo); } - if (TM.Options.ShouldEmitDebugEntryValues()) + if (TM.Options.EnableDebugEntryValues) MF.addCallArgsForwardingRegs(&*CallI, std::move(CSInfo)); } - if (YamlMF.CallSitesInfo.size() && !TM.Options.ShouldEmitDebugEntryValues()) + if (YamlMF.CallSitesInfo.size() && !TM.Options.EnableDebugEntryValues) return error(Twine("Call site info provided but not used")); return false; } diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index 2eb8d94..06b5ab5 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -865,7 +865,8 @@ MachineFunction::CallSiteInfoMap::iterator MachineFunction::getCallSiteInfo(const MachineInstr *MI) { assert(MI->isCandidateForCallSiteEntry() && "Call site info refers only to call (MI) candidates"); - if (!Target.Options.ShouldEmitDebugEntryValues()) + + if (!Target.Options.EnableDebugEntryValues) return CallSitesInfo.end(); return CallSitesInfo.find(MI); } diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index ea0bcd1f..7bded00 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -867,7 +867,7 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) { } if (MI->isCandidateForCallSiteEntry() && - DAG->getTarget().Options.SupportsDebugEntryValues) + DAG->getTarget().Options.EnableDebugEntryValues) MF.addCallArgsForwardingRegs(MI, DAG->getSDCallSiteInfo(Node)); return MI; diff --git a/llvm/lib/CodeGen/TargetOptionsImpl.cpp b/llvm/lib/CodeGen/TargetOptionsImpl.cpp index 3db0f2f..d794a26 100644 --- a/llvm/lib/CodeGen/TargetOptionsImpl.cpp +++ b/llvm/lib/CodeGen/TargetOptionsImpl.cpp @@ -45,11 +45,3 @@ bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const { bool TargetOptions::HonorSignDependentRoundingFPMath() const { return !UnsafeFPMath && HonorSignDependentRoundingFPMathOption; } - -/// NOTE: There are targets that still do not support the call site info -/// production (the info about the arguments passed to the call, necessary -/// for the debug entry values), so we keep using the experimental option -/// (-debug-entry-values) to test them as well. -bool TargetOptions::ShouldEmitDebugEntryValues() const { - return SupportsDebugEntryValues || EnableDebugEntryValues; -} diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 57dc51d..e01762e 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -4169,7 +4169,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI, RegsToPass.emplace_back(VA.getLocReg(), Arg); RegsUsed.insert(VA.getLocReg()); const TargetOptions &Options = DAG.getTarget().Options; - if (Options.SupportsDebugEntryValues) + if (Options.EnableDebugEntryValues) CSInfo.emplace_back(VA.getLocReg(), i); } } else { diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index d50bd09..bc7b438 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -309,9 +309,6 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT, // AArch64 supports default outlining behaviour. setSupportsDefaultOutlining(true); - - // AArch64 supports the debug entry values. - setSupportsDebugEntryValues(true); } AArch64TargetMachine::~AArch64TargetMachine() = default; diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index f6ee9c0..bd82c8f 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -2223,7 +2223,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, isThisReturn = true; } const TargetOptions &Options = DAG.getTarget().Options; - if (Options.SupportsDebugEntryValues) + if (Options.EnableDebugEntryValues) CSInfo.emplace_back(VA.getLocReg(), i); RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else if (isByVal) { diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index 63aa652..84876eda 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -243,9 +243,6 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT, this->Options.NoTrapAfterNoreturn = true; } - // ARM supports the debug entry values. - setSupportsDebugEntryValues(true); - initAsmInfo(); } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 60b0654..8cd177a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4020,7 +4020,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, } else if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); const TargetOptions &Options = DAG.getTarget().Options; - if (Options.SupportsDebugEntryValues) + if (Options.EnableDebugEntryValues) CSInfo.emplace_back(VA.getLocReg(), I); if (isVarArg && IsWin64) { // Win64 ABI requires argument XMM reg to be copied to the corresponding diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 0cfa7bb..22b4e28 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -232,9 +232,6 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT, setMachineOutliner(true); - // x86 supports the debug entry values. - setSupportsDebugEntryValues(true); - initAsmInfo(); } |