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| author | Craig Topper <craig.topper@sifive.com> | 2023-04-26 17:11:58 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-04-26 17:11:58 -0700 |
| commit | 5854b39847251fded061b46ba03df6a361deadf8 (patch) | |
| tree | 0344133f91f7de0c233e971c11aeca677ea71a10 /llvm/lib | |
| parent | c266bfe278bb586ddb03111c6656d5fe3a2ad554 (diff) | |
| download | llvm-5854b39847251fded061b46ba03df6a361deadf8.zip llvm-5854b39847251fded061b46ba03df6a361deadf8.tar.gz llvm-5854b39847251fded061b46ba03df6a361deadf8.tar.bz2 | |
[RISCV] Remove the uret instruction.
This was part of the N extension which did not make it into
version 1.12 of the privilege specification.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D149308
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfo.td | 9 |
3 files changed, 1 insertions, 14 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 1dcc1bf..8104f19 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -14531,9 +14531,7 @@ RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, StringRef Kind = MF.getFunction().getFnAttribute("interrupt").getValueAsString(); - if (Kind == "user") - RetOpc = RISCVISD::URET_GLUE; - else if (Kind == "supervisor") + if (Kind == "supervisor") RetOpc = RISCVISD::SRET_GLUE; else RetOpc = RISCVISD::MRET_GLUE; @@ -14607,7 +14605,6 @@ const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const { case RISCVISD::FIRST_NUMBER: break; NODE_NAME_CASE(RET_GLUE) - NODE_NAME_CASE(URET_GLUE) NODE_NAME_CASE(SRET_GLUE) NODE_NAME_CASE(MRET_GLUE) NODE_NAME_CASE(CALL) diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index ddfe319..b48cdb2 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -28,7 +28,6 @@ namespace RISCVISD { enum NodeType : unsigned { FIRST_NUMBER = ISD::BUILTIN_OP_END, RET_GLUE, - URET_GLUE, SRET_GLUE, MRET_GLUE, CALL, diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index b125ed5..5e1131a 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -57,8 +57,6 @@ def riscv_call : SDNode<"RISCVISD::CALL", SDT_RISCVCall, SDNPVariadic]>; def riscv_ret_glue : SDNode<"RISCVISD::RET_GLUE", SDTNone, [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; -def riscv_uret_glue : SDNode<"RISCVISD::URET_GLUE", SDTNone, - [SDNPHasChain, SDNPOptInGlue]>; def riscv_sret_glue : SDNode<"RISCVISD::SRET_GLUE", SDTNone, [SDNPHasChain, SDNPOptInGlue]>; def riscv_mret_glue : SDNode<"RISCVISD::MRET_GLUE", SDTNone, @@ -822,12 +820,6 @@ def SRAW : ALUW_rr<0b0100000, 0b101, "sraw">, //===----------------------------------------------------------------------===// let isBarrier = 1, isReturn = 1, isTerminator = 1 in { -def URET : Priv<"uret", 0b0000000>, Sched<[]> { - let rd = 0; - let rs1 = 0; - let rs2 = 0b00010; -} - def SRET : Priv<"sret", 0b0001000>, Sched<[]> { let rd = 0; let rs1 = 0; @@ -1562,7 +1554,6 @@ def PseudoCALL : Pseudo<(outs), (ins call_symbol:$func), []>, def : Pat<(riscv_call tglobaladdr:$func), (PseudoCALL tglobaladdr:$func)>; def : Pat<(riscv_call texternalsym:$func), (PseudoCALL texternalsym:$func)>; -def : Pat<(riscv_uret_glue), (URET X0, X0)>; def : Pat<(riscv_sret_glue), (SRET X0, X0)>; def : Pat<(riscv_mret_glue), (MRET X0, X0)>; |