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| author | Craig Topper <craig.topper@sifive.com> | 2025-08-30 21:25:56 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-30 21:25:56 -0700 |
| commit | 4a6435397ba587022ecafa772cd504b8659da2fb (patch) | |
| tree | 2125af50b6864d4f9104875e02b919626e36dda0 /llvm/lib | |
| parent | 1d8fdda7b0a9f47c443600bca6af2bc141e4abf7 (diff) | |
| download | llvm-4a6435397ba587022ecafa772cd504b8659da2fb.zip llvm-4a6435397ba587022ecafa772cd504b8659da2fb.tar.gz llvm-4a6435397ba587022ecafa772cd504b8659da2fb.tar.bz2 | |
[SelectionDAG] Add computeKnownBits for ISD::ROTL/ROTR. (#156142)
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 967306a..5c75bc1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -3850,6 +3850,22 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts, Known = KnownBits::ashr(Known, Known2, /*ShAmtNonZero=*/false, Op->getFlags().hasExact()); break; + case ISD::ROTL: + case ISD::ROTR: + if (ConstantSDNode *C = + isConstOrConstSplat(Op.getOperand(1), DemandedElts)) { + unsigned Amt = C->getAPIntValue().urem(BitWidth); + + Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); + + // Canonicalize to ROTR. + if (Opcode == ISD::ROTL && Amt != 0) + Amt = BitWidth - Amt; + + Known.Zero = Known.Zero.rotr(Amt); + Known.One = Known.One.rotr(Amt); + } + break; case ISD::FSHL: case ISD::FSHR: if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(2), DemandedElts)) { |