diff options
author | Kazu Hirata <kazu@google.com> | 2022-02-06 10:54:44 -0800 |
---|---|---|
committer | Kazu Hirata <kazu@google.com> | 2022-02-06 10:54:44 -0800 |
commit | 3a8c51480ff881ff7fcd5831bf1b31d3c66519ed (patch) | |
tree | c1a0bb087f5e8965e26f02be9a8ee9a77db015b9 /llvm/lib | |
parent | 631b94cc22a83205c1d26baadb579b9c5576c8eb (diff) | |
download | llvm-3a8c51480ff881ff7fcd5831bf1b31d3c66519ed.zip llvm-3a8c51480ff881ff7fcd5831bf1b31d3c66519ed.tar.gz llvm-3a8c51480ff881ff7fcd5831bf1b31d3c66519ed.tar.bz2 |
[CodeGen] Use = default (NFC)
Identified with modernize-use-equals-default
Diffstat (limited to 'llvm/lib')
20 files changed, 22 insertions, 26 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp b/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp index 223840c..626df7b 100644 --- a/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp @@ -28,7 +28,7 @@ using namespace llvm; ARMException::ARMException(AsmPrinter *A) : DwarfCFIExceptionBase(A) {} -ARMException::~ARMException() {} +ARMException::~ARMException() = default; ARMTargetStreamer &ARMException::getTargetStreamer() { MCTargetStreamer &TS = *Asm->OutStreamer->getTargetStreamer(); diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp index 63343d2..e0a7553 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp @@ -53,7 +53,7 @@ void DwarfCFIExceptionBase::endFragment() { DwarfCFIException::DwarfCFIException(AsmPrinter *A) : DwarfCFIExceptionBase(A) {} -DwarfCFIException::~DwarfCFIException() {} +DwarfCFIException::~DwarfCFIException() = default; /// endModule - Emit all exception information that should come after the /// content. diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h index 4e1a1b1..0289f53 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -80,7 +80,7 @@ private: public: DbgEntity(const DINode *N, const DILocation *IA, DbgEntityKind ID) : Entity(N), InlinedAt(IA), SubclassID(ID) {} - virtual ~DbgEntity() {} + virtual ~DbgEntity() = default; /// Accessors. /// @{ diff --git a/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp b/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp index ad84323..776f70f 100644 --- a/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp @@ -29,7 +29,7 @@ using namespace llvm; WinCFGuard::WinCFGuard(AsmPrinter *A) : Asm(A) {} -WinCFGuard::~WinCFGuard() {} +WinCFGuard::~WinCFGuard() = default; void WinCFGuard::endFunction(const MachineFunction *MF) { diff --git a/llvm/lib/CodeGen/AsmPrinter/WinException.cpp b/llvm/lib/CodeGen/AsmPrinter/WinException.cpp index ef57031..dbfa7d4 100644 --- a/llvm/lib/CodeGen/AsmPrinter/WinException.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/WinException.cpp @@ -46,7 +46,7 @@ WinException::WinException(AsmPrinter *A) : EHStreamer(A) { isThumb = Asm->TM.getTargetTriple().isThumb(); } -WinException::~WinException() {} +WinException::~WinException() = default; /// endModule - Emit all exception information that should come after the /// content. diff --git a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp index f9bfe85..e6b7493 100644 --- a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp @@ -88,7 +88,7 @@ void GISelCSEInfo::setMF(MachineFunction &MF) { this->MRI = &MF.getRegInfo(); } -GISelCSEInfo::~GISelCSEInfo() {} +GISelCSEInfo::~GISelCSEInfo() = default; bool GISelCSEInfo::isUniqueMachineInstValid( const UniqueMachineInstr &UMI) const { diff --git a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp index 30f88388..d50ed80 100644 --- a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp +++ b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp @@ -57,8 +57,7 @@ class WorkListMaintainer : public GISelChangeObserver { public: WorkListMaintainer(WorkListTy &WorkList) : WorkList(WorkList) {} - virtual ~WorkListMaintainer() { - } + virtual ~WorkListMaintainer() = default; void erasingInstr(MachineInstr &MI) override { LLVM_DEBUG(dbgs() << "Erasing: " << MI << "\n"); diff --git a/llvm/lib/CodeGen/InterferenceCache.h b/llvm/lib/CodeGen/InterferenceCache.h index ace1691..97464da 100644 --- a/llvm/lib/CodeGen/InterferenceCache.h +++ b/llvm/lib/CodeGen/InterferenceCache.h @@ -37,7 +37,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache { SlotIndex First; SlotIndex Last; - BlockInterference() {} + BlockInterference() = default; }; /// Entry - A cache entry containing interference information for all aliases diff --git a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp index 6af5f07..b6632f9 100644 --- a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp +++ b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp @@ -899,7 +899,7 @@ MachineInstrBuilder MLocTracker::emitLoc(Optional<LocIdx> MLoc, } /// Default construct and initialize the pass. -InstrRefBasedLDV::InstrRefBasedLDV() {} +InstrRefBasedLDV::InstrRefBasedLDV() = default; bool InstrRefBasedLDV::isCalleeSaved(LocIdx L) const { unsigned Reg = MTracker->LocIdxToLocID[L]; diff --git a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp index 40770b1..2e927fb 100644 --- a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp +++ b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp @@ -65,7 +65,7 @@ public: static char ID; LiveDebugValues(); - ~LiveDebugValues() {} + ~LiveDebugValues() = default; /// Calculate the liveness information for the given machine function. bool runOnMachineFunction(MachineFunction &MF) override; diff --git a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.h b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.h index 8f0b2ec..c6da5bd 100644 --- a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.h +++ b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.h @@ -28,7 +28,7 @@ public: virtual bool ExtendRanges(MachineFunction &MF, MachineDominatorTree *DomTree, TargetPassConfig *TPC, unsigned InputBBLimit, unsigned InputDbgValLimit) = 0; - virtual ~LDVImpl() {} + virtual ~LDVImpl() = default; }; } // namespace SharedLiveDebugValues diff --git a/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp b/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp index 42a0967..ff11c79 100644 --- a/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp +++ b/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp @@ -1035,9 +1035,9 @@ public: // Implementation //===----------------------------------------------------------------------===// -VarLocBasedLDV::VarLocBasedLDV() { } +VarLocBasedLDV::VarLocBasedLDV() = default; -VarLocBasedLDV::~VarLocBasedLDV() { } +VarLocBasedLDV::~VarLocBasedLDV() = default; /// Erase a variable from the set of open ranges, and additionally erase any /// fragments that may overlap it. If the VarLoc is a backup location, erase diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp index f144639..69b0e8c 100644 --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -1023,7 +1023,7 @@ SMDiagnostic MIRParserImpl::diagFromBlockStringDiag(const SMDiagnostic &Error, MIRParser::MIRParser(std::unique_ptr<MIRParserImpl> Impl) : Impl(std::move(Impl)) {} -MIRParser::~MIRParser() {} +MIRParser::~MIRParser() = default; std::unique_ptr<Module> MIRParser::parseIRModule(DataLayoutCallbackTy DataLayoutCallback) { diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 8c9d00d..8f1995f 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -53,8 +53,7 @@ MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B) IrrLoopHeaderWeight = B->getIrrLoopHeaderWeight(); } -MachineBasicBlock::~MachineBasicBlock() { -} +MachineBasicBlock::~MachineBasicBlock() = default; /// Return the MCSymbol for this basic block. MCSymbol *MachineBasicBlock::getSymbol() const { diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp index f9b16d2..66b4dcdb 100644 --- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp +++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp @@ -810,7 +810,7 @@ protected: unsigned CurrentSrcIdx = 0; ///< The index of the source being rewritten. public: Rewriter(MachineInstr &CopyLike) : CopyLike(CopyLike) {} - virtual ~Rewriter() {} + virtual ~Rewriter() = default; /// Get the next rewritable source (SrcReg, SrcSubReg) and /// the related value that it affects (DstReg, DstSubReg). diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp index aac46cb..f8fb21e 100644 --- a/llvm/lib/CodeGen/PostRASchedulerList.cpp +++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp @@ -72,7 +72,7 @@ DebugMod("postra-sched-debugmod", cl::desc("Debug control MBBs that are scheduled"), cl::init(0), cl::Hidden); -AntiDepBreaker::~AntiDepBreaker() { } +AntiDepBreaker::~AntiDepBreaker() = default; namespace { class PostRAScheduler : public MachineFunctionPass { diff --git a/llvm/lib/CodeGen/PseudoSourceValue.cpp b/llvm/lib/CodeGen/PseudoSourceValue.cpp index 74e721d..52a36f6 100644 --- a/llvm/lib/CodeGen/PseudoSourceValue.cpp +++ b/llvm/lib/CodeGen/PseudoSourceValue.cpp @@ -29,8 +29,7 @@ PseudoSourceValue::PseudoSourceValue(unsigned Kind, const TargetInstrInfo &TII) AddressSpace = TII.getAddressSpaceForPseudoSourceKind(Kind); } - -PseudoSourceValue::~PseudoSourceValue() {} +PseudoSourceValue::~PseudoSourceValue() = default; void PseudoSourceValue::printCustom(raw_ostream &O) const { if (Kind < TargetCustom) diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp index 93d86b2..6b0d621 100644 --- a/llvm/lib/CodeGen/TargetInstrInfo.cpp +++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp @@ -41,8 +41,7 @@ static cl::opt<bool> DisableHazardRecognizer( "disable-sched-hazard", cl::Hidden, cl::init(false), cl::desc("Disable hazard detection during preRA scheduling")); -TargetInstrInfo::~TargetInstrInfo() { -} +TargetInstrInfo::~TargetInstrInfo() = default; const TargetRegisterClass* TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, @@ -1402,7 +1401,7 @@ std::string TargetInstrInfo::createMIROperandComment( return OS.str(); } -TargetInstrInfo::PipelinerLoopInfo::~PipelinerLoopInfo() {} +TargetInstrInfo::PipelinerLoopInfo::~PipelinerLoopInfo() = default; void TargetInstrInfo::mergeOutliningCandidateAttributes( Function &F, std::vector<outliner::Candidate> &Candidates) const { diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp index ce35003..0892c74 100644 --- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp @@ -2547,7 +2547,7 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry( //===----------------------------------------------------------------------===// // GOFF //===----------------------------------------------------------------------===// -TargetLoweringObjectFileGOFF::TargetLoweringObjectFileGOFF() {} +TargetLoweringObjectFileGOFF::TargetLoweringObjectFileGOFF() = default; MCSection *TargetLoweringObjectFileGOFF::getExplicitSectionGlobal( const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const { diff --git a/llvm/lib/CodeGen/WinEHPrepare.cpp b/llvm/lib/CodeGen/WinEHPrepare.cpp index d31183e..702d60a 100644 --- a/llvm/lib/CodeGen/WinEHPrepare.cpp +++ b/llvm/lib/CodeGen/WinEHPrepare.cpp @@ -1256,4 +1256,4 @@ void WinEHFuncInfo::addIPToStateRange(const InvokeInst *II, LabelToStateMap[InvokeBegin] = std::make_pair(InvokeStateMap[II], InvokeEnd); } -WinEHFuncInfo::WinEHFuncInfo() {} +WinEHFuncInfo::WinEHFuncInfo() = default; |