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authorLemonBoy <thatlemon@gmail.com>2020-06-09 19:17:43 -0700
committerEli Friedman <efriedma@quicinc.com>2020-06-09 19:29:42 -0700
commit28415e588f1c501967a9b596e6651787996f93ff (patch)
tree7bd72555bd8bf07e126f3c374c1f26b0691acd93 /llvm/lib
parentceaee253f4f3079d2786697d099e43e9f61f897a (diff)
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[SPARC] Lower fp16 ops to libcalls
The fp16 ops are legalized by extending/chopping them as needed. The tests are shamelessly stolen from the RISC-V backend. Differential Revision: https://reviews.llvm.org/D77569
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Sparc/SparcISelLowering.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index f598d423..c9743c5 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1465,6 +1465,7 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
// Turn FP extload into load/fpextend
for (MVT VT : MVT::fp_valuetypes()) {
+ setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand);
}
@@ -1474,6 +1475,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
// Turn FP truncstore into trunc + store.
+ setTruncStoreAction(MVT::f32, MVT::f16, Expand);
+ setTruncStoreAction(MVT::f64, MVT::f16, Expand);
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
setTruncStoreAction(MVT::f128, MVT::f32, Expand);
setTruncStoreAction(MVT::f128, MVT::f64, Expand);
@@ -1515,6 +1518,12 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
+ // Lower f16 conversion operations into library calls
+ setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
+ setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
+
setOperationAction(ISD::BITCAST, MVT::f32, Expand);
setOperationAction(ISD::BITCAST, MVT::i32, Expand);