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authorAlex MacLean <amaclean@nvidia.com>2025-04-16 06:48:42 -0700
committerGitHub <noreply@github.com>2025-04-16 06:48:42 -0700
commit1bfd44462886b167f0d82e44e6a9856a830c1f8b (patch)
tree7a4a7dd39612459609bbad5c8a7d2a5e46549dc9 /llvm/lib
parentaf28c9c65a23806a09d7929792df5ed2e9bdf946 (diff)
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[DAGCombiner] Fold and/or of NaN SETCC (#135645)
Fold an AND or OR of two NaN SETCC nodes into a single SETCC where possible. This optimization already exists in InstCombine but adding in here as well can allow for additional folding if more logical operations are exposed.
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d72be35..ab8e182 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6448,6 +6448,12 @@ static SDValue foldAndOrOfSETCC(SDNode *LogicOp, SelectionDAG &DAG) {
}
}
+ if (LHS0 == LHS1 && RHS0 == RHS1 && CCL == CCR &&
+ LHS0.getValueType() == RHS0.getValueType() &&
+ ((LogicOp->getOpcode() == ISD::AND && CCL == ISD::SETO) ||
+ (LogicOp->getOpcode() == ISD::OR && CCL == ISD::SETUO)))
+ return DAG.getSetCC(DL, VT, LHS0, RHS0, CCL);
+
if (TargetPreference == AndOrSETCCFoldKind::None)
return SDValue();