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authorpaperchalice <liujunchang97@outlook.com>2024-06-02 09:12:33 +0800
committerGitHub <noreply@github.com>2024-06-02 09:12:33 +0800
commitd2cdc8ab45d74f8691f73cb5a2b8c431585cd449 (patch)
tree0aa5cbc5236038b0496289d33c037714bf767c32 /llvm/lib/Target/PowerPC
parent0310f7f2d0c56a5697710251cec9803cbf7b4d56 (diff)
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[NewPM][CodeGen] Port selection dag isel to new pass manager (#83567)
Port selection dag isel to new pass manager. Only `AMDGPU` and `X86` support new pass version. `-verify-machineinstrs` in new pass manager belongs to verify instrumentation, it is enabled by default.
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r--llvm/lib/Target/PowerPC/PPC.h2
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp18
-rw-r--r--llvm/lib/Target/PowerPC/PPCTargetMachine.cpp2
3 files changed, 14 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h
index eb8886d..94a59d1 100644
--- a/llvm/lib/Target/PowerPC/PPC.h
+++ b/llvm/lib/Target/PowerPC/PPC.h
@@ -78,7 +78,7 @@ class ModulePass;
void initializePPCMIPeepholePass(PassRegistry&);
void initializePPCExpandAtomicPseudoPass(PassRegistry &);
void initializePPCCTRLoopsPass(PassRegistry &);
- void initializePPCDAGToDAGISelPass(PassRegistry &);
+ void initializePPCDAGToDAGISelLegacyPass(PassRegistry &);
void initializePPCMergeStringPoolPass(PassRegistry &);
extern char &PPCVSXFMAMutateID;
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 26560dc..275b333 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -147,12 +147,10 @@ namespace {
unsigned GlobalBaseReg = 0;
public:
- static char ID;
-
PPCDAGToDAGISel() = delete;
explicit PPCDAGToDAGISel(PPCTargetMachine &tm, CodeGenOptLevel OptLevel)
- : SelectionDAGISel(ID, tm, OptLevel), TM(tm) {}
+ : SelectionDAGISel(tm, OptLevel), TM(tm) {}
bool runOnMachineFunction(MachineFunction &MF) override {
// Make sure we re-emit a set of the global base reg if necessary
@@ -447,11 +445,19 @@ private:
void transferMemOperands(SDNode *N, SDNode *Result);
};
+ class PPCDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
+ public:
+ static char ID;
+ explicit PPCDAGToDAGISelLegacy(PPCTargetMachine &tm,
+ CodeGenOptLevel OptLevel)
+ : SelectionDAGISelLegacy(
+ ID, std::make_unique<PPCDAGToDAGISel>(tm, OptLevel)) {}
+ };
} // end anonymous namespace
-char PPCDAGToDAGISel::ID = 0;
+char PPCDAGToDAGISelLegacy::ID = 0;
-INITIALIZE_PASS(PPCDAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false)
+INITIALIZE_PASS(PPCDAGToDAGISelLegacy, DEBUG_TYPE, PASS_NAME, false, false)
/// getGlobalBaseReg - Output the instructions required to put the
/// base address to use for accessing globals into a register.
@@ -7921,5 +7927,5 @@ void PPCDAGToDAGISel::PeepholePPC64() {
///
FunctionPass *llvm::createPPCISelDag(PPCTargetMachine &TM,
CodeGenOptLevel OptLevel) {
- return new PPCDAGToDAGISel(TM, OptLevel);
+ return new PPCDAGToDAGISelLegacy(TM, OptLevel);
}
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 714cf69..1ef891d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -141,7 +141,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() {
initializePPCExpandAtomicPseudoPass(PR);
initializeGlobalISel(PR);
initializePPCCTRLoopsPass(PR);
- initializePPCDAGToDAGISelPass(PR);
+ initializePPCDAGToDAGISelLegacyPass(PR);
initializePPCMergeStringPoolPass(PR);
}