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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-05-20 21:05:47 -0400 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-05-23 13:24:42 -0400 |
| commit | 76e3dd0a490d7da25ccf35c29b3b7ec34908f7d6 (patch) | |
| tree | 88b5e9e5c84da6ac0f005765930094c76348c18d /llvm/lib/CodeGen | |
| parent | 2e82667f60237c32d8a10eb04825ff434a3e474c (diff) | |
| download | llvm-76e3dd0a490d7da25ccf35c29b3b7ec34908f7d6.zip llvm-76e3dd0a490d7da25ccf35c29b3b7ec34908f7d6.tar.gz llvm-76e3dd0a490d7da25ccf35c29b3b7ec34908f7d6.tar.bz2 | |
AMDGPU: Implement isConstantPhysReg
I don't think any of these registers are used in contexts where this
would do anything yet.
Diffstat (limited to 'llvm/lib/CodeGen')
0 files changed, 0 insertions, 0 deletions