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| author | Craig Topper <craig.topper@sifive.com> | 2025-03-11 20:21:36 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-11 20:21:36 -0700 |
| commit | d898761ca24acd62448993b369a1c1b95354707d (patch) | |
| tree | 755fc353da03a10952c06db6e3e189e00423bf66 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 725726171240afa76166392d105900040a00c5b4 (diff) | |
| download | llvm-d898761ca24acd62448993b369a1c1b95354707d.zip llvm-d898761ca24acd62448993b369a1c1b95354707d.tar.gz llvm-d898761ca24acd62448993b369a1c1b95354707d.tar.bz2 | |
[RISCV] FeatureVendorXwchc should imply FeatureStdExtZca. (#130817)
If we don't do this the binary emission won't set the compressed flag in
the ELF header and won't emit alignment NOPs for R_RISCV_ALIGN correctly
to support the existence of 2 byte instructions in the stream.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions